Please wait, while we are loading the content...
Please wait, while we are loading the content...
| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ming Ying Tengh, A. Yew Choon Chia Mohtar, A. Pak Wing Wong |
| Copyright Year | 2007 |
| Description | Author affiliation: Seagate Singapore Int. Headquarters Pte Ltd., Singapore (Ming Ying; Tengh, A.; Yew Choon Chia; Mohtar, A.; Pak Wing Wong) |
| Abstract | Flip-chip-on-board technology has gained its acceptance rapidly in printed circuit board assembly as one of choices for electrically challenged, form factor sensitive and high interconnect density applications. Due to the significant mismatch in the coefficients of thermal expansion among the materials of silicon chip and motherboard, solder bumps are subject to large thermal induced stresses which may lead to solder bump reliability issue. Underfilling of the mounted bare die is necessary in order to maintain the integrity of solder bumps to address the reliability issue. A key requirement of flip chip underfilling is that it should be void-free. Air trapped beneath the die or around solder bumps will result in reliability problems and possibly early component failures. In the present study, several potential root causes for underfill void are investigated for printed circuit board assembly to minimize process defects. Flip chips with lead-free solder bumps are mounted on a high Tg FR-4 based printed circuit board with non-solder mask defined pads. Flux dipping and normal convection reflow are adopted for printed circuit board assembly. No-clean flux is selected in order to eliminate flux clean process and hence to improve mass production output. Capillary-flow flux-compatible underfill is then needle dispensed to the bare dies. After underfill curing process, scanning acoustic microscope is employed for non-destructive underfill void detection. It is found that there are two key factors of achieving underfill void-free, one is the underfill gap between the flip chip active surface and printed circuit board top surface, and the other one is the assembled board holding time before underfill process. Larger underfill gap can help the flow to overcome surface tensions of the die/underfill and solder mask/underfill interfaces and also increase the wavefront speed. Shorter assembled board holding time has less risk of underfill void because of less moisture absorbed. Flux type affects solder bump solderability and collapse height, and eventually the underfill gap. The flux with normal reaction activity level is suitable for fine pitch die in terms of maintaining a certain solder bump standoff height. Optimization of underfilling patterns can help to eliminate underfill void, but it is inflexible because of the limitation of the clearance between die to adjacent components for printed circuit board assembly. It is found that anhydride-based underfill has higher capability to wash the flux residues than phenol-based underfill. Selection of anhydride-based and finer filler size underfill material can reduce the amount of the voids and achieve a homogeneous flow. |
| Starting Page | 805 |
| Ending Page | 810 |
| File Size | 444338 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424413249 |
| DOI | 10.1109/EPTC.2007.4469688 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-12-10 |
| Publisher Place | Singapore |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Printed circuits Assembly Thermal stresses Flip chip Thermal expansion Environmentally friendly manufacturing techniques Lead Surface acoustic waves Integrated circuit interconnections Rapid thermal processing |
| Content Type | Text |
| Resource Type | Article |
National Digital Library of India (NDLI) is a virtual repository of learning resources which is not just a repository with search/browse facilities but provides a host of services for the learner community. It is sponsored and mentored by Ministry of Education, Government of India, through its National Mission on Education through Information and Communication Technology (NMEICT). Filtered and federated searching is employed to facilitate focused searching so that learners can find the right resource with least effort and in minimum time. NDLI provides user group-specific services such as Examination Preparatory for School and College students and job aspirants. Services for Researchers and general learners are also provided. NDLI is designed to hold content of any language and provides interface support for 10 most widely used Indian languages. It is built to provide support for all academic levels including researchers and life-long learners, all disciplines, all popular forms of access devices and differently-abled learners. It is designed to enable people to learn and prepare from best practices from all over the world and to facilitate researchers to perform inter-linked exploration from multiple sources. It is developed, operated and maintained from Indian Institute of Technology Kharagpur.
Learn more about this project from here.
NDLI is a conglomeration of freely available or institutionally contributed or donated or publisher managed contents. Almost all these contents are hosted and accessed from respective sources. The responsibility for authenticity, relevance, completeness, accuracy, reliability and suitability of these contents rests with the respective organization and NDLI has no responsibility or liability for these. Every effort is made to keep the NDLI portal up and running smoothly unless there are some unavoidable technical issues.
Ministry of Education, through its National Mission on Education through Information and Communication Technology (NMEICT), has sponsored and funded the National Digital Library of India (NDLI) project.
| Sl. | Authority | Responsibilities | Communication Details |
|---|---|---|---|
| 1 | Ministry of Education (GoI), Department of Higher Education |
Sanctioning Authority | https://www.education.gov.in/ict-initiatives |
| 2 | Indian Institute of Technology Kharagpur | Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project | https://www.iitkgp.ac.in |
| 3 | National Digital Library of India Office, Indian Institute of Technology Kharagpur | The administrative and infrastructural headquarters of the project | Dr. B. Sutradhar bsutra@ndl.gov.in |
| 4 | Project PI / Joint PI | Principal Investigator and Joint Principal Investigators of the project |
Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon |
| 5 | Website/Portal (Helpdesk) | Queries regarding NDLI and its services | support@ndl.gov.in |
| 6 | Contents and Copyright Issues | Queries related to content curation and copyright issues | content@ndl.gov.in |
| 7 | National Digital Library of India Club (NDLI Club) | Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach | clubsupport@ndl.gov.in |
| 8 | Digital Preservation Centre (DPC) | Assistance with digitizing and archiving copyright-free printed books | dpc@ndl.gov.in |
| 9 | IDR Setup or Support | Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops | idr@ndl.gov.in |
|
Loading...
|