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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Xia Zhang Xueping Guo Zhiyong Cui Xin Gu Linwen Kong Liqiang Cao Lixi Wan |
| Copyright Year | 2011 |
| Description | Author affiliation: Shenzhen Circuit Limited Company, Gaoqiao Industrial Zone, Pingdi Street, Longgang District, Shenzhe 518117, China (Xin Gu; Linwen Kong) || Institute of Microelectronics of Chinese Academy of Sciences, No.3, Bei-Tu-Cheng West Road, Beijing 100029, China (Xia Zhang; Xueping Guo; Zhiyong Cui; Liqiang Cao; Lixi Wan) |
| Abstract | Miniaturization, high density, multi-function and low cost of electronics has brought more requirements and challenges to the substrate and package level. This, in turn, has added more functionality to the substrate compared to the printed circuit board. A substrate embedded with both the active and the passive components, is also referred to as a functional substrate. In this paper, we propose, design, fabricate and test a functional substrate with embedded chips. The simulation, optimization and fabrication process of embedding active components inside the organic substrate is discussed. The motivation for this research is to examine ways to reduce both manufacturing cost and time-to-market. Simple daisy chain chips are designed and used in the simulated manufacturing exercise. In order to effectively simulate the fabrication process, thermal loading conditions have to be investigated. This can be done efficiently by numerical studies based on Finite Element Analyses (FEA). The thermal-mechanical properties of three embedding materials are also estimated through FEA analysis. Based on these process optimization simulations, functional substrates with embedded chips have been manufactured. Two laminated sequences are used in the fabrication process. The electrical and related reliability tests have been performed and demonstrate the viability of the manufacturing process for the embedding technology. |
| Starting Page | 1 |
| Ending Page | 5 |
| File Size | 2327783 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781457717703 |
| e-ISBN | 9781457717697 |
| e-ISBN | 9781457717680 |
| DOI | 10.1109/ICEPT.2011.6067032 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-08-08 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Substrates Fabrication Lamination Packaging Copper Electronics packaging |
| Content Type | Text |
| Resource Type | Article |
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