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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Won Kyoung Choi Premachandran, C.S. Ong Siong Chiew Xie Ling Liao Ebin Khairyanto, A. Ratmin, B. Sheng, K.C.W. Phyo Phyo Thaw Lau, J.H. |
| Copyright Year | 2009 |
| Description | Author affiliation: Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research), 11 Science Park Road, Singapore Science Park II, Singapore 117685 (Won Kyoung Choi; Premachandran, C.S.; Ong Siong Chiew; Xie Ling; Liao Ebin; Khairyanto, A.; Ratmin, B.; Sheng, K.C.W.; Phyo Phyo Thaw) || Hong Kong University of Science & Technology, Hong Kong (Lau, J.H.) |
| Abstract | Low temperature bonding technology was developed using In-alloy on Au at a low temperature below 200 °C forming robust intermetallics (IMC) joints with high remelting temperature (≫300°C), so that after bonding, the IMC joints can withstand the subsequent processes without any degradation. Process parameters on the solder joint were optimized extensively in bonding and annealing process (temperature, time, and pressure). The joint fabricated at an optimal condition, which is 180°C for 45sec followed by annealing at 120°C for 12hrs, was evaluated in terms of microstructure and compositional observations by means of scanning electron microscope (SEM) and transmittance electron microscope (TEM). As a result, it was confirmed that the joint was completely occupied with the Au-In based IMC phases. And the re-melting temperature was measured as above 400°C by using Differential Scanning Calorimetery (DSC) and Thermo-Mechanical Analysis (TMA). This IMC joint showed a high bonding shear strength (≫20MPa) and a low electrical resistance (≪100mΩ). Based on this study, the 3 stacked dice with 8×8 $mm^{2}$ dies with ∼1700 I/Os of 80um solder bumps were fabricated in a chip to chip stacking method. It showed uniform bonding all over the die in each layer and the high bonding strength of ∼40 MPa and passed the 3 times reflow test at 260 °C. The IMC joint reliability was examined. After going through the multiple reflows at 260°C, the bonded samples exhibited no delaminating and no changes in the bonding strength and the electrical resistance. |
| Starting Page | 333 |
| Ending Page | 338 |
| File Size | 1092392 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424444755 |
| ISSN | 05695503 |
| DOI | 10.1109/ECTC.2009.5074036 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-05-26 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Intermetallic Transistors Indium Temperature Bonding Three-dimensional integrated circuits Stacking Scanning electron microscopy Annealing Transmission electron microscopy |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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