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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Nikitakis, A. Paganos, T. Papaefstathiou, I. |
| Copyright Year | 2014 |
| Description | Author affiliation: Dept. of Electron. & Comput. Eng., Tech. Univ. of Crete, Chania, Greece (Nikitakis, A.; Paganos, T.) || Synelixis Solutions Ltd., Chalkida, Greece (Papaefstathiou, I.) |
| Abstract | One of the most important challenges in the field of Computer Vision is the implementation of low-power embedded systems that will execute very accurate, yet real-time, algorithms. In the visual tracking sector one of the most promising approaches is the recently introduced OpenTLD algorithm which uses a random forest classification method. While it is very robust, it cannot be efficiently parallelized in its native form as its memory access pattern has certain characteristics that make it hard to take advantage of the conventional memory hierarchies. In this paper, we present a novel embedded system implementing this algorithm. We accelerate the bottleneck of the algorithm by designing and implementing a high bandwidth distributed memory sub-system which is independent of the various software parameters. We demonstrate the applicability and efficiency of this novel approach by implementing our scheme in a modern FPGA. |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 933290 |
| Page Count | 4 |
| File Format | |
| ISBN | 9783981537024 |
| DOI | 10.7873/DATE.2014.353 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-03-24 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | European Design Automation Association (EDAA) |
| Subject Keyword | Hardware Graphics processing units Classification algorithms Field programmable gate arrays Embedded systems Algorithm design and analysis Computer architecture FPGA Embedded System Object Tracking Distributed Memory Random Forests Classification |
| Content Type | Text |
| Resource Type | Article |
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