NDLI: Efficient performance estimation with very small sample size via physical subspace projection and maximum a posteriori estimation

Content Provider	IEEE Xplore Digital Library
Author	Li Yu Saxena, S. Hess, C. Elfadel, I.A.M. Antoniadis, D. Boning, D.
Copyright Year	2014
Abstract	In this paper, we propose a novel integrated circuits performance estimation algorithm through a physical subspace projection and maximum-a-posteriori (MAP) estimation. Our goal is to estimate the distribution of a target circuit performance with very small measurement sample size from on-chip monitor circuits. The key idea in this work is to exploit the fact that simulation and measurement data are physically correlated under different circuit configurations and topologies. First, different groups of measurements are projected to a subspace spanned by a set of physical variables. The projection is achieved by performing a sensitivity analysis of measurement parameters with respect to the subspace variables using a virtual source MOSFET compact model. Then a Bayesian treatment is developed by introducing prior distributions over these subspace variables. Maximum a posteriori estimation is then applied using the prior, and an expectation-maximization (EM) algorithm is used to estimate the circuit performance. The proposed method is validated by postsilicon measurement for a commercial 28-nm process. An average error reduction of 2x is achieved which can be translated to 32x reduction on data size needed for samples on the same die. A 150x and 70x sample size reduction on training dies is also achieved compared to traditional least-square fitting method and least-angle regression method, respectively, without reducing accuracy.
Starting Page	1
Ending Page	6
File Size	538535
Page Count	6
File Format	PDF
ISBN	9783981537024
DOI	10.7873/DATE.2014.239
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-03-24
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	European Design Automation Association (EDAA)
Subject Keyword	Integrated circuit modeling Estimation Semiconductor device modeling Bayes methods Frequency measurement Training System-on-chip
Content Type	Text
Resource Type	Article

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