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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Burgio, P. Tagliavini, G. Conti, F. Marongiu, A. Benini, L. |
| Copyright Year | 2014 |
| Description | Author affiliation: DEI, Univ. degli Studi di Bologna, Bologna, Italy (Burgio, P.; Tagliavini, G.; Conti, F.; Marongiu, A.; Benini, L.) |
| Abstract | Modern designs for embedded systems are increasingly embracing cluster-based architectures, where small sets of cores communicate through tightly-coupled shared memory banks and high-performance interconnections. At the same time, the complexity of modern applications requires new programming abstractions to exploit dynamic and/or irregular parallelism on such platforms. Supporting dynamic parallelism in systems which i) are resource-constrained and ii) run applications with small units of work calls for a runtime environment which has minimal overhead for the scheduling of parallel tasks. In this work, we study the major sources of overhead in the implementation of OpenMP dynamic loops, sections and tasks, and propose a hardware implementation of a generic Scheduling Engine (HWSE) which fits the semantics of the three constructs. The HWSE is designed as a tightly-coupled block to the PEs within a multi-core cluster, communicating through a shared-memory interface. This allows very fast programming and synchronization with the controlling PEs, fundamental to achieving fast dynamic scheduling, and ultimately to enable fine-grained parallelism. We prove the effectiveness of our solutions with real applications and synthetic benchmarks, using a cycle-accurate virtual platform. |
| Starting Page | 1 |
| Ending Page | 6 |
| File Size | 190957 |
| Page Count | 6 |
| File Format | |
| ISBN | 9783981537024 |
| DOI | 10.7873/DATE.2014.169 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-03-24 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | European Design Automation Association (EDAA) |
| Subject Keyword | Parallel processing Programming Dynamic scheduling Hardware Software Acceleration Computer architecture |
| Content Type | Text |
| Resource Type | Article |
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