NDLI: Exploiting STT-NV technology for reconfigurable, high performance, low power, and low temperature functional unit design

Content Provider	IEEE Xplore Digital Library
Author	Ashammagari, A.R. Mahmoodi, H. Homayoun, H.
Copyright Year	2014
Description	Author affiliation: Dept. of Electr. & Comput. Eng., George Mason Univ., Fairfax, VA, USA (Ashammagari, A.R.; Homayoun, H.) \|\| Dept. of Comput. Eng., San Francisco State Univ., San Francisco, CA, USA (Mahmoodi, H.)
Abstract	Unavailability of functional units and their unequal activity makes performance bottlenecks and thermal hot spot units in general-purpose processors. We propose to use reconfigurable functional units to overcome these challenges. A selected set of complex functional units that might be underutilized, such as a multiplier and divider, are realized in a time-multiplexed fashion using a shared programmable Look Up Table (LUT) based fabric. This allows for run-time reconfiguration and migration of their activity. LUT based implementation also allows under-utilized functional units to be dynamically reconfigured to the functional units that have a performance bottleneck and hence improving performance. The programmable LUTs are realized using Spin Transfer Torque (STT) Magnetic technology (also called STT-NV) due to its zero leakage and CMOS compatibility. The results show significant performance improvement of 16% on average across standard benchmarks, when replacing CMOS multiplier and divider with reconfigurable STT-NV LUT counterpart. In addition, reconfiguration reduces the maximum temperature of functional units by up to $27^{°}C$ and almost eliminates the thermal variation across them. This comes with small power overhead and no area impact.
Starting Page	1
Ending Page	6
File Size	905829
Page Count	6
File Format	PDF
ISBN	9783981537024
DOI	10.7873/DATE.2014.348
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-03-24
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	European Design Automation Association (EDAA)
Subject Keyword	Table lookup CMOS integrated circuits Benchmark testing Program processors Magnetic tunneling Adders CMOS technology divider STT-NV logic reconfigurable architecture low power functional units low temperature multiplier
Content Type	Text
Resource Type	Article

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