NDLI: Hybrid wire-surface wave architecture for one-to-many communication in networks-on-chip

Content Provider	IEEE Xplore Digital Library
Author	Karkar, A. Dahir, N. Al-Dujaily, R. Tong, K. Mak, T. Yakovlev, A.
Copyright Year	2014
Description	Author affiliation: Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Hong Kong, China (Mak, T.) \|\| Sch. of Electr. & Electron. Eng., Newcastle Univ., Newcastle upon Tyne, UK (Karkar, A.; Dahir, N.; Yakovlev, A.) \|\| IT Res. Centre, Univ. of Kufa, Kufa, Iraq (Al-Dujaily, R.) \|\| Dept. of Electr. & Electron. Eng., UCL, London, UK (Tong, K.)
Abstract	Network-on-chip (NoC) is a communication paradigm that has emerged to tackle different on-chip challenges and has satisfied different demands in terms of high performance and economical interconnect implementation. However, merely metal based NoC pursuit offers limited scalability with the relentless technology scaling, especially in one-to-many (1-to-M) communication. To meet the scalability demand, this paper proposes a new hybrid architecture empowered by both metal interconnects and Zenneck surface wave interconnects (SWI). This architecture, in conjunction with newly proposed routing and global arbitration schemes, avoids overloading the NoC and alleviates traffic hotspots compared to the trend of handling 1-to-M traffic as unicast. This work addresses the system level challenges for intra chip multicasting. Evaluation results, based on a cycle-accurate simulation and hardware description, demonstrate the effectiveness of the proposed architecture in terms of power reduction ratio of 4 to 12X and average delay reduction of 25X or more, compared to a regular NoC. These results are achieved with negligible hardware overheads.
Starting Page	1
Ending Page	4
File Size	304512
Page Count	4
File Format	PDF
ISBN	9783981537024
DOI	10.7873/DATE.2014.287
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-03-24
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	European Design Automation Association (EDAA)
Subject Keyword	Integrated circuit interconnections Surface waves Optical surface waves Surface impedance System-on-chip Protocols Computer architecture
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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