NDLI: A compiler and runtime for heterogeneous computing

Content Provider	IEEE Xplore Digital Library
Author	Auerbach, J. Bacon, D.F. Burcea, I. Cheng, P. Fink, S.J. Rabbah, R. Shukla, S.
Copyright Year	2012
Abstract	Heterogeneous systems show a lot of promise for extracting highperformance by combining the benefits of conventional architectures with specialized accelerators in the form of graphics processors (GPUs) and reconfigurable hardware (FPGAs). Extracting this performance often entails programming in disparate languages and models, making it hard for a programmer to work equally well on all aspects of an application. Further, relatively little attention is paid to co-execution - the problem of orchestrating program execution using multiple distinct computational elements that work seamlessly together. We present Liquid Metal, a comprehensive compiler and runtime system for a new programming language called Lime. Our work enables the use of a single language for programming heterogeneous computing platforms, and the seamless co-execution of the resultant programs on CPUs and accelerators that include GPUs and FPGAs. We have developed a number of Lime applications, and successfully compiled some of these for co-execution on various GPU and FPGA enabled architectures. Our experience so far leads us to believe the Liquid Metal approach is promising and can make the computational power of heterogeneous architectures more easily accessible to mainstream programmers.
Starting Page	271
Ending Page	276
File Size	1217644
Page Count	6
File Format	PDF
ISBN	9781450311991
ISSN	0738100X
e-ISBN	9781450311991
DOI	10.1145/2228360.2228411
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-06-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Runtime Field programmable gate arrays Graphics processing unit Metals Liquids Arrays Java Heterogeneous GPU FPGA Streaming
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A compiler and runtime for heterogeneous computing

A heterogeneous platform with GPU and FPGA for power efficient high performance computing

An exploration of heterogeneous systems

GPU Approach to FPGA placement based on star+

GPU Versus FPGA for High Productivity Computing

Image convolution processing: A GPU versus FPGA comparison

Implementation and Performance Analysis of SEAL Encryption on FPGA, GPU and Multi-core Processors

Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?

GPU-Accelerated Wire-Length Estimation for FPGA Placement

A compiler and runtime for heterogeneous computing

Similar Documents

A compiler and runtime for heterogeneous computing

A heterogeneous platform with GPU and FPGA for power efficient high performance computing

An exploration of heterogeneous systems

GPU Approach to FPGA placement based on star+

GPU Versus FPGA for High Productivity Computing

Image convolution processing: A GPU versus FPGA comparison

Implementation and Performance Analysis of SEAL Encryption on FPGA, GPU and Multi-core Processors

Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?

GPU-Accelerated Wire-Length Estimation for FPGA Placement

A compiler and runtime for heterogeneous computing