NDLI: Process variation in near-threshold wide SIMD architectures

Content Provider	IEEE Xplore Digital Library
Author	Sangwon Seo Dreslinski, R.G. Woh, M. Yongjun Park Charkrabari, C. Mahlke, S. Blaauw, D. Mudge, T.
Copyright Year	2012
Description	Author affiliation: Arizona State University, Tempe, AZ 85287 (Charkrabari, C.) \|\| University of Michigan, Ann Arbor, MI 48109 (Sangwon Seo; Dreslinski, R.G.; Woh, M.; Yongjun Park; Mahlke, S.; Blaauw, D.; Mudge, T.)
Abstract	Near-threshold operation has emerged as a competitive approach for energy-efficient architecture design. In particular, a combination of near-threshold circuit techniques and parallel SIMD computations achieves excellent energy efficiency for easy-to-parallelize applications. However, near-threshold operations suffer from delay variations due to increased process variability. This is exacerbated in wide SIMD architectures where the number of critical paths are multiplied by the SIMD width. This paper provides a systematic in-depth study of delay variations in near-threshold operations and shows that simple techniques such as structural duplication and supply voltage/frequency margining are sufficient to mitigate the timing variation problems in wide SIMD architectures at the cost of marginal area and power overhead.
Starting Page	980
Ending Page	987
File Size	1109221
Page Count	8
File Format	PDF
ISBN	9781450311991
ISSN	0738100X
e-ISBN	9781450311991
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-06-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Delay Inverters Computer architecture Pipelines Logic gates Clocks Process Variation Near-threshold Computing Wide SIMD
Content Type	Text
Resource Type	Article

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