NDLI: Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System

Content Provider	IEEE Xplore Digital Library
Author	Collins, R.L. Carloni, L.P.
Copyright Year	2007
Description	Author affiliation: Columbia Univ., New York (Collins, R.L.; Carloni, L.P.)
Abstract	We consider the problem of optimizing the performance of a latency-insensitive system (LIS) where the addition of backpressure has caused throughput degradation. Previous works have addressed the problem of LIS performance in different ways. In particular, the insertion of relay stations and the sizing of the input queues in the shells are the two main optimization techniques that have been proposed. We provide a unifying framework for this problem by outlining which approaches work for different system topologies, and highlighting counterexamples where some solutions do not work. We also observe that in the most difficult class of topologies, instances with the greatest throughput degradation are typically very amenable to simplifications. The contributions of this paper include a characterization of topologies that maintain optimal throughput with fixed- size queues and a heuristic for sizing queues that produces solutions close to optimal in a fraction of the time.
Starting Page	410
Ending Page	415
File Size	621480
Page Count	6
File Format	PDF
ISBN	9781595936271
ISSN	0738100X
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-06-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Throughput Relays Clocks Topology Computer science Degradation Buffer storage Wire Pipeline processing Concurrent computing Performance Latency-Insensitive Design Performance Analysis. General Terms Algorithms
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Topology-based optimization of maximal sustainable throughput in a latency-insensitive system

Topology-based optimization of maximal sustainable throughput in a latency-insensitive system (2007)

Topology-based performance analysis and optimization of latency-insensitive systems.

Recovery-based resilient latency-insensitive systems

1topology-based performance analysis and optimization of latency-insensitive systems.

Topology-Based Performance Analysis and Optimization of Latency-Insensitive Systems

High-level optimization of pipeline design

A new approach to latency insensitive design

A new system design methodology for wire pipelined SoC

Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System

Similar Documents

Topology-based optimization of maximal sustainable throughput in a latency-insensitive system

Topology-based optimization of maximal sustainable throughput in a latency-insensitive system (2007)

Topology-based performance analysis and optimization of latency-insensitive systems.

Recovery-based resilient latency-insensitive systems

1topology-based performance analysis and optimization of latency-insensitive systems.

Topology-Based Performance Analysis and Optimization of Latency-Insensitive Systems

High-level optimization of pipeline design

A new approach to latency insensitive design

A new system design methodology for wire pipelined SoC

Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System