NDLI: Applicability of power-gating strategies for aging mitigation of CMOS logic paths

Content Provider	IEEE Xplore Digital Library
Author	Khoshavi, N. Ashraf, R.A. DeMara, R.F.
Copyright Year	2014
Description	Author affiliation: Dept. of Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA (Khoshavi, N.; Ashraf, R.A.; DeMara, R.F.)
Abstract	Aggressive CMOS technology scaling trends exacerbate the aging-related degradation of propagation delay and energy efficiency in nanoscale designs. Recently, Power-gating has been utilized as an effective low-power design technique which has also been shown to alleviate some aging impacts. However, the use of MOSFETs to realize power-gated designs will also encounter aging-induced degradations in the sleep transistors themselves which necessitates the exploration of design strategies to utilize power-gating effectively to mitigate aging. In particular, Bias Temperature Instability (BTI) which occurs during activation of power-gated voltage islands is investigated with respect to the placement of the sleep transistor in the header or footer as well as the impact of ungated input transitions on interfacial trapping. Results indicate the effectiveness of power-gating on NBTI/PBTI phenomena and propose a preferred sleep transistor configuration for maximizing higher recovery.
Starting Page	929
Ending Page	932
File Size	517290
Page Count	4
File Format	PDF
ISBN	9781479941346
ISSN	15483746
e-ISBN	9781479941322
DOI	10.1109/MWSCAS.2014.6908568
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-08-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Aging Degradation MOSFET Delays Stress low power design aging power-gating voltage islands sleep trasnsistor MOSFET threshold-voltage shift Bias Temperature Instability (BTI) NBTI PBTI
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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