NDLI: Simulations of $3^{rd}$ order voltage switched CP-PLL using a fast event switching macromodeling

Content Provider	IEEE Xplore Digital Library
Author	Ali, E. Rahajandraibe, W. Haddad, F. Hangmann, C. Hedayat, C.
Copyright Year	2014
Description	Author affiliation: Sensor Technol. group, Univ. of Paderborn, Paderborn, Germany (Hangmann, C.) \|\| Dept. ASE, Fraunhofer ENAS, Paderborn, Germany (Hedayat, C.) \|\| IM2NP, Aix-Marseille Univ., Marseille, France (Ali, E.; Rahajandraibe, W.; Haddad, F.)
Abstract	The charge-pump phase-locked loop (CP-PLL) has gained an essential place in the wide area of the radio frequency (RF) communication and industrial electronics. Since it is a combination of analog and digital elements, it enhances the complexity to study the transient behavior of an arbitrary ordered CP-PLL using any general feedback system concept. Concerning the PLL circuit, particularity that operating with voltage switched charge pump (VSCP) supplements the peculiarity arising in the form of non-constant pump current. Whereas its characterization in transient time off-locking and on-locking region remains critical due to its unbalanced pumping characteristics. The linear models are valid for small phase errors in the locked state. However, transistor level models are very near to the real design but are constrained with time-inefficiency and computer resource consumption. In this paper, the transient behavior of the $3^{rd}$ order VSCP-PLL is investigated using an ultra-fast and resource efficient event-driven (ED) macro-modeling technique. Due to its inherent competency, the off-locking behavior of the system can easily be characterized. Related to the VSCP-PLL architecture, the ED model is simulated and some features are highlighted using piece-wise linear and non-linear VCO. Moreover, the work is extended to compare its performance with an equivalent PLL operating with a current switched charge-pump (CSCP) for a constant and ramp function of the reference frequency.
Starting Page	491
Ending Page	494
File Size	508073
Page Count	4
File Format	PDF
ISBN	9781479941346
ISSN	15483746
e-ISBN	9781479941322
DOI	10.1109/MWSCAS.2014.6908459
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-08-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Phase locked loops Charge pumps Switches Voltage-controlled oscillators Phase frequency detector Transient analysis Frequency conversion mixed-signal PLL system CP-PLL Event Driven Technique voltage operated charge-pump
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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