NDLI: High voltage charge pump with triple well diodes in a 0.13 µm bulk CMOS process

Content Provider	IEEE Xplore Digital Library
Author	Jiwei Sun Pingshan Wang
Copyright Year	2014
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Clemson Univ., Clemson, SC, USA (Jiwei Sun; Pingshan Wang)
Abstract	This paper presents charge pump circuits with modified triple well diodes as charge transfer switches for charging on-chip pulse generation circuits in a low-voltage bulk CMOS process. Guard-rings and isolation deep n-wells are used to improve the breakdown voltages and reduce leakage currents of the diodes. Model parameters of the triple well diode are extracted based on measured diode characteristics. These parameters are then used to analyze our charge pump. The proposed charge pump circuits are implemented in a commercial 0.13 μm bulk CMOS process. The output voltage of the four-stage charge pump circuit can be up to 18.1 V, which is much higher than the n-well/p-substrate breakdown voltage (~10 V) of the given process.
Starting Page	274
Ending Page	277
File Size	588823
Page Count	4
File Format	PDF
ISBN	9781479941346
ISSN	15483746
e-ISBN	9781479941322
DOI	10.1109/MWSCAS.2014.6908405
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-08-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Charge pumps Voltage measurement Clocks CMOS process Cathodes Parasitic capacitance Breakdown voltage model parameter extraction charge pump triple well diodes
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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