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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hung, C.L. Su, Y.H. Cheng, A.L.-P. |
| Copyright Year | 2007 |
| Description | Author affiliation: Nat. Chi Nan Univ., Nantou (Hung, C.L.) |
| Abstract | The complexity of IC (integrated circuit) design increases as semiconductor fabrication miniaturizes. Assembly of the reusable basic components of the IC design process has become valuable in accelerating development and marketing of new IC applications. As a result, the idea of SIP (silicon intellectual property) has emerged to meet this demand. The purpose of this paper is to develop a SIP valuation model. However, assessing such intangible assets cost high and have a time-consuming negotiation process to safeguard performance. After intensive interviews with SIP providers, we model a SIP valuation process, which incorporates with quality signals, links to the SIP infomediaries, and augments with the industry dynamics. The results are further suggested to support with Internet SIP malls, which are installed to take the advantages of multimedia interface and real-time archive for facilitating the SIP valuation processes. |
| Starting Page | 592 |
| Ending Page | 596 |
| File Size | 513786 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781424415281 |
| DOI | 10.1109/IEEM.2007.4419258 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-12-02 |
| Publisher Place | Singapore |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Process design Semiconductor Valuation Contracting Cost accounting Application specific integrated circuits Fabrication Electronics industry Intellectual property Signal processing Silicon Acceleration Silicon Intellectual Property Assembly |
| Content Type | Text |
| Resource Type | Article |
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