NDLI: SOC Implementation of HMM Based Speaker Independent Isolated Digit Recognition System

Content Provider	IEEE Xplore Digital Library
Author	Amudha, V. Venkataramani, B. Vinoth Kumar, R. Ravishankar, S.
Copyright Year	2007
Description	Author affiliation: Dept. of Electr. & Comput. Eng., National Inst. of Technol., Tiruchirappalli (Amudha, V.; Venkataramani, B.; Vinoth Kumar, R.; Ravishankar, S.)
Abstract	In this paper, the design and implementation results of a system on a chip (SOC) based speech recognition system are presented. The hidden Markov model (HMM) is used for the speech recognition. In order to implement this in SOC, the various tasks required are optimally partitioned between hardware and software. The SOC, housed in Altera UP3 kit, consists of both Altera Nios II soft core processor and custom hardware blocks for computationally intensive blocks such as Viterbi decoder. The preprocessing and training of HMM are implemented in software (using C program). The Viterbi decoding is implemented in hardware for real time recognition. It is also implemented in software for verification and comparison. It is observed that the hardware implementation of Viterbi block is 80 times faster than the software approach using C program. The speech recognition system is trained for digits 0-9 uttered by three male speakers. It is tested with trained speakers utterances and three new untrained speakers' utterances. An over all recognition accuracy of 94.8% is achieved. Extension of this work for larger vocabulary size is under progress
Sponsorship	VLSI Soc. of India IEEE CAS Soc. IEEE ED Soc. ACM IEEE SSC Soc
Starting Page	848
Ending Page	853
File Size	166387
Page Count	6
File Format	PDF
ISBN	0769527620
ISSN	10639667
DOI	10.1109/VLSID.2007.144
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-01-06
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hidden Markov models Speech recognition Hardware System-on-a-chip Viterbi algorithm Decoding Field programmable gate arrays Feature extraction Application software Cepstral analysis
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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