NDLI: Tutorial T7B: RF Analysis and Simulation with Focus on RF SiP Methodology

Content Provider	IEEE Xplore Digital Library
Author	Gupta, S. Kukal, T. Tripathi, A. Mitra, R. Patni, A. Shetty, S.
Copyright Year	2007
Description	Author affiliation: Cadence Design Syst. Pvt Ltd., Noida (Gupta, S.; Kukal, T.; Tripathi, A.; Mitra, R.; Patni, A.; Shetty, S.)
Abstract	Radio frequency (RF) involves complexities in the circuit design. Non-linearity issues in active as well as passive circuit designs and issues such as parasitic couplings and radiation effects introduce challenges in the RF circuit designs. Besides these, engineers face challenges, such as reduction in design cycle, overall development cost, and the time to market. To address these challenges, RF designs require extensive analysis and simulations techniques, as well as special measurement techniques. Traditionally, at the system level, separate groups design ICs and packages. However, cost, time-to-market issues, and ever-growing package complexity in the nanometer design space demand close collaboration between design groups. System level integration with SiP requires design flows and methodologies that bridge the gap between IC design and package design. An RF SiP is a complete functional system or sub system that includes multiple ICs from different or same process technology, and embedded passives connected using a complex RF structure. This system or sub system can either be packaged as an IC and mounted or integrated into a PCB. This tutorial will first introduce the basic understanding and challenges in RF system designs. This will be followed by the discussion on the analysis, simulation and measurement techniques used for RF designs. Finally, the tutorial would talk about the RF SiP flow and the design methodology. An RF SiP design example will be used to discuss various aspects of SiP, interfaces between IC layout and SiP layout, embedded components, interconnects, constraints, SiP level routing, design rule checks and RF SiP level simulation. In the next generation nanometer designs, the RF SiP design flow and methodology will be critical to meet the overall design requirements
Sponsorship	VLSI Soc. of India IEEE CAS Soc. IEEE ED Soc. ACM IEEE SSC Soc
Starting Page	11
Ending Page	11
File Size	173121
Page Count	1
File Format	PDF
ISBN	0769527620
ISSN	10639667
DOI	10.1109/VLSID.2007.172
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-01-06
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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