NDLI: Tutorial T8A: Automated Application Engine Synthesis from C Algorithms

Content Provider	IEEE Xplore Digital Library
Author	Kathail, V. Aditya, S. Gleason, C. Chatekar, N.
Copyright Year	2007
Description	Author affiliation: Synfora, Inc., Bangalore (Kathail, V.; Aditya, S.; Gleason, C.)
Abstract	Increasingly IC design is driven by integrated consumer devices, which rely on standard algorithms such as H.264, 802.1 In, or JPEG2000. These standards allow room for innovative implementation that can result in differentiated products. The architect's dilemma is that a disproportionate amount of the design time and the cost is spent on the hardware implementation and verification and not on algorithmic innovation. Automatic Application Engine Synthesis (AES) enables the creation of complex application engines such as an H.264 encoder directly from untimed C algorithms. It enables the designer to explore multiple design alternatives with different performance, area and power profiles in a very short period of time. This tutorial will focus on the use of AES methodology to design application engines consisting of configurable processors, hardware accelerators and complex interconnect, from C algorithms. The emphasis will be on describing techniques for synthesizing good HW from C code, competitive with manual design, for complex, multi-block hardware accelerators with the associated bus/memory/stream interconnect, as well as the verification and system validation of the resulting RTL. These blocks are crucial components of application engines, and they provide orders-of-magnitude improvement in performance and power compared to running the equivalent functions in software. Each topic will be presented taking examples from real-life designs. We will also present users' experiences in building a complete design using this methodology.
Sponsorship	VLSI Soc. of India IEEE CAS Soc. IEEE ED Soc. ACM IEEE SSC Soc
Starting Page	12
Ending Page	12
File Size	157852
Page Count	1
File Format	PDF
ISBN	0769527620
ISSN	10639667
DOI	10.1109/VLSID.2007.173
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-01-06
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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