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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hanawa, H. Onodera, H. Nakajima, A. Horio, K. |
| Copyright Year | 2013 |
| Description | Author affiliation: Fac. of Syst. Eng., Shibaura Inst. of Technol., Saitama, Japan (Hanawa, H.; Onodera, H.; Nakajima, A.; Horio, K.) |
| Abstract | Two-dimensional analysis of lag phenomena, current collapse and breakdown voltages in source-field-plate AlGaN/GaN HEMTs is performed by considering a deep donor and a deep acceptor in a buffer layer, and the results are compared with those for the case of gate-field-plate structure. It is shown that the reduction rate of drain-lag is similar between the two structures, but the reduction rates of gate lag and current collapse are smaller for the source-field-plate structure. This is because the electric field at the drain edge of the gate becomes higher in the off state and the trapping effects become more significant. For this reason, an off-state breakdown voltage is a little lower in the source-field-plate structure. It is suggested that there is an optimum thickness of SiN passivation layer to minimize the buffer-related current collapse in both structures. |
| Sponsorship | IEEE Electron Devices Soc. |
| File Size | 519932 |
| File Format | |
| ISBN | 9781479901128 |
| ISSN | 19381891 |
| e-ISBN | 9781479901135 |
| e-ISBN | 9781479901111 |
| DOI | 10.1109/IRPS.2013.6532058 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-04-14 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Logic gates Gallium nitride Aluminum gallium nitride HEMTs MODFETs Buffer layers Transient analysis two-dimensional analysis GaN HEMT field plate lag phenomena current collapse breakdown voltage |
| Content Type | Text |
| Resource Type | Article |
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