NDLI: Towards a standard flow for system level power modeling

Content Provider	IEEE Xplore Digital Library
Author	Dhanwada, Nagu Davis, Rhett Frenkil, Jerry
Copyright Year	2014
Description	Author affiliation: Si2, 132 Jennie Dugan Rd, Concord, MA 01742 (Frenkil, Jerry) \|\| IBM Corporation, 2070 Route 52, MS2A1, Hopewell Junction, NY 12533 (Dhanwada, Nagu) \|\| North Carolina State University, 440 Monteith Research Center, Raleigh, NC 27695 (Davis, Rhett)
Abstract	Power efficiency is a key design objective for most SoCs today and designers continue to search for new approaches to low power design. As transistor level, gate level and RTL methods have become well understood and widely adopted, interest has grown in power aware system design. This interest has arisen along with the overall growth and adoption of SystemC for functional modeling and simulation. In a comprehensive power aware flow, power analyses and optimizations occur during all three major design phases: System Design, RTL Design, and Implementation. These activities require models that represent the power characteristics of each design element. However, unlike RTL Design and Implementation, System Design has no standard power modeling or analysis mechanisms. This lack of abstract, system level power models inhibits system level power analysis: where models are unavailable the flow is unrealized, where models are available the accuracy and flexibility is often limited. This issue motivated the development of modeling capabilities for IP block abstract power models for use in all phases of SoC design. This development built upon existing gate level modeling semantics and flows. This presentation will begin with an overview of existing gate level power modeling capabilities, using the Liberty modeling language as the example. The interpretation of the models by power calculation applications will be described, including the interaction between power models and simulation data. Requirements beyond the existing gate level capabilities will be described. Key requirements include black-box and grey-box modeling styles, methods for handling the exponential explosion of power states and power state transitions, automatic model generation, power component categorization, and descriptions of power structure and power operation. Some of these requirements have already been implemented while others are in the proposal stage. Example usage of such a system level model will be illustrated with a Transaction Level (TLM) Simulation. The example will illustrate how the model is used to produce dynamic and leakage power calculations from the TLM simulation data.
Starting Page	73
Ending Page	73
File Size	555870
Page Count	1
File Format	PDF
ISBN	9781479962785
DOI	10.1109/ICCAD.2014.7001333
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-11-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Data models Logic gates Analytical models Abstracts System analysis and design Standards System-on-chip
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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