NDLI: Data-aware DRAM refresh to squeeze the margin of retention time in hybrid memory cube

Content Provider	IEEE Xplore Digital Library
Author	Yinhe Han Ying Wang Huawei Li Xiaowei Li
Copyright Year	2014
Description	Author affiliation: State Key Lab. of Comput. Archit., Inst. of Comput. Technol., Beijing, China (Yinhe Han; Ying Wang; Huawei Li; Xiaowei Li)
Abstract	With the increase of storage density, DRAM refresh leads to higher overhead of power and bandwidth, particularly in emerging 3D stacked memory design like Hybrid Memory Cube (HMC). To exploit the hardware resources for a smarter solution, we propose a data-aware refresh control scheme, Trial and Error (Trial-n-Error), which leverages the data-pattern dependence characteristics of the cells' retention time to reduce refresh operations. Trial-n-Error is a systematic approach that employs our proposed Synergy Testing to capture the refresh bottleneck of DRAM memory: “weak” cells that have a relatively shorter retention time. By locating the dominant weak cells sensitized by applications, Trial-n-Error can avoid the worst-case refresh setting, and adjust the refresh rate under the control of our self-tuning algorithm. Thus, Trial-n-Error can gradually approach to the possible lower-bound of refresh rate for less energy and memory bandwidth consumption. In experiments of 3D-stacked DRAMs, we successfully eliminate an average of 28% refresh operations and save 21% refresh energy for a set of pre-profiled synthetic data patterns and real benchmarks.
Starting Page	295
Ending Page	300
File Size	993841
Page Count	6
File Format	PDF
ISBN	9781479962785
DOI	10.1109/ICCAD.2014.7001366
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-11-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random access memory Tuning Benchmark testing Radiation detectors Computer architecture Three-dimensional displays
Content Type	Text
Resource Type	Article

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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