NDLI: BASIC: an advanced high-performance bipolar process

Content Provider	IEEE Xplore Digital Library
Author	van der Velden, J. Dekker, R. van Es, R. Jansen, S. Koolen, M. Kranen, P. Maas, H. Pruijmboom, A.
Copyright Year	1989
Description	Author affiliation: Philips Res. Lab., Eindhoven, Netherlands (van der Velden, J.; Dekker, R.; van Es, R.; Jansen, S.; Koolen, M.; Kranen, P.; Maas, H.; Pruijmboom, A.)
Abstract	A novel high-performance bipolar process suitable for analog applications is described. A self-aligned technology called BASIC (best alignment with sidewall contact) yields a sidewall contacted structure with strongly reduced parasitic capacitances and low base resistance. The base link-up problem, which is of particular importance for analog applications, is eliminated in the BASIC process by the introduction of a well-defined submicron region, into which a link-up base adjustment dose can be implanted. A simple, novel polysilicon planarization method has been used to form sidewall contacted base boosts. The method is based on the controlled diffusion of boron in polysilicon, followed by the selective wet etching of undoped polysilicon. DC and AC characteristics for the npn transistor exhibit a combination of properties that makes this process very suitable for analog applications, featuring a maximum f/sub T/ of 17 GHz and an Early voltage of 80 V. Two-dimensional device simulations indicate that the increase in Early voltage by more than a factor of two for narrow emitters is caused by lateral depletion of the collector region underneath the intrinsic emitter-base region.<>
Starting Page	233
Ending Page	236
File Size	343838
Page Count	4
File Format	PDF
ISBN	0780308174
ISSN	01631918
DOI	10.1109/IEDM.1989.74268
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1989-12-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon Oxidation Wet etching Boron Fabrication Anisotropic magnetoresistance Planarization Conductivity Implants Transistors
Content Type	Text
Resource Type	Article
Subject	Materials Chemistry Electronic, Optical and Magnetic Materials Condensed Matter Physics Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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