NDLI: Nondestructive Measurement of the Residual Stresses in Copper Through-Silicon Vias Using Synchrotron-Based Microbeam X-Ray Diffraction

Content Provider	IEEE Xplore Digital Library
Author	Okoro, C. Levine, L.E. Ruqing Xu Hummler, K. Obeng, Y.S.
Copyright Year	1963
Abstract	In this paper, we report a new method for achieving depth resolved determination of the full stress tensor in buried Cu through-silicon vias (TSVs), using a synchrotron-based X-ray microdiffraction technique. Two adjacent Cu TSVs were analyzed; one capped with SiO₂ (0.17 μm) and the other without. The uncapped Cu TSV was found to have higher stresses with an average hydrostatic stress value of 145 ± 37 MPa, as compared with the capped Cu TSV, which had a value of 89 ± 28 MPa. Finite element-based parametric analyses of the effect of cap thickness on TSV stress were also performed. The differences in the stresses in the adjacent Cu TSVs were attributed to their microstructural differences and not to the presence of a cap layer. Based on the experimentally determined stresses, the stresses in the surrounding Si for both Cu TSVs were calculated and the FinFET keep-out-zone (KOZ) from the Cu TSV was estimated. The FinFET KOZ is influenced by the microstructural variations in their neighboring Cu TSVs, thus, it should be accounted for in KOZ design rules.
Sponsorship	IEEE Electron Devices Society
Starting Page	2473
Ending Page	2479
Page Count	7
File Size	2820329
File Format	PDF
ISSN	00189383
Volume Number	61
Issue Number	7
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Stress Through-silicon vias Detectors Uncertainty Stress measurement Silicon X-ray diffraction X-ray diffraction. Interconnect keep-out-zone (KOZ) stress measurement synchrotron three-dimensional integrated circuits (3DIC) through-silicon via (TSV)
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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An Effective Approach of Reducing the Keep-Out-Zone Induced by Coaxial Through-Silicon-Via

Study of Near-Surface Stresses in Silicon Around Through-Silicon Vias at Elevated Temperatures by Raman Spectroscopy and Simulations

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Effects of Copper Plasticity on the Induction of Stress in Silicon from Copper Through-Silicon Vias (TSVs) for 3D Integrated Circuits

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Metal Proportion Optimization of Annular Through-Silicon via Considering Temperature and Keep-Out Zone

Investigation on Cu TSV-Induced KOZ in Silicon Chips: Simulations and Experiments

Nondestructive Measurement of the Residual Stresses in Copper Through-Silicon Vias Using Synchrotron-Based Microbeam X-Ray Diffraction

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