NDLI: Toward Amp-Level Field Emission With Large-Area Arrays of Pt-Coated Self-Aligned Gated Nanoscale Tips

Content Provider	IEEE Xplore Digital Library
Author	Fomani, A.A. Guerrera, S.A. Velasquez-Garcia, L.F. Akinwande, A.I.T.
Copyright Year	1963
Abstract	Design, fabrication, and characterization of Pt-coated, self-aligned, and gated Si field emission arrays are reported. Arrays of 320000 tips with 10 μm pitch are employed to emit currents as high as 0.35 A (current density of 1.1 A/cm²) at gate-emitter biases of 300 V. For reliability, the devices have a gate dielectric thicker than 2.5 μm maintaining the field inside gate insulator below 150 V/μm and a 5-nm-thick Pt-coating protecting the tips against sputtering by back-streaming ions. The Pt-coating also increases the capture cross section of electrons from the emitter cone, resulting in higher emission currents compared with uncoated Si tips when the supply of electrons is limited to the surface. The device failure at high currents is associated with plasma ignition due to local pressure rise caused by outgassing of the anode. At lower emission currents, the devices are capable of long-term emission (>3 h) at pressures as high as 10^-5 Torr. Furthermore, a high-yield fabrication process is presented for large-area fabrication of highly-uniform gated tip arrays that could be expanded to active areas larger than 10 cm² to increase the emission current.
Sponsorship	IEEE Electron Devices Society
Starting Page	2538
Ending Page	2546
Page Count	9
File Size	3370303
File Format	PDF
ISSN	00189383
Volume Number	61
Issue Number	7
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates Silicon Dielectrics Fabrication Anodes Etching vacuum electronic devices. Electron sources field emission gated tip arrays self-aligned structures vacuum electronic devices
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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