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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ming-Yi Tsai Pu-Shan Huang Chen-Yu Huang Hsiu Jao Huang, B. Wu, B. Yuan-Yuan Lin Liao, W. Huang, J. Huang, L. Shih, S. Jeng Ping Lin |
| Copyright Year | 1963 |
| Abstract | The technology of through silicon via (TSV) is one of the most promising enablers for 3-D integrated circuit (IC) integration. The embedded TSVs in silicon chips would, however, cause the problem of carrier mobility changes in surrounding devices. There are two objectives in this paper. The first objective is to numerically and experimentally investigate the effect of via-middle Cu TSV on the mobility change of metal-oxide-semiconductor transistors in the wafer-level silicon chips for this 3-D IC integration. The second objective is to further determine the keep-out zone (KOZ) in terms of the key parameters such as the SiO2 layer effect, the zero-stress temperature, the single and array vias, the through and blind vias, silicon material properties, as well as the diameter and pitch of vias. KOZs based on the >10% change in carrier mobility are identified by finite element numerical calculations associated with the corresponding piezoresistance coefficients. The numerical results of the changes in saturated current are experimentally validated with good agreements. With the results of detailed analyzes using this validated model, the key parameters affecting the KOZs are presented and further discussed in detail. |
| Sponsorship | IEEE Electron Devices Society |
| Starting Page | 2331 |
| Ending Page | 2337 |
| Page Count | 7 |
| File Size | 1199601 |
| File Format | |
| ISSN | 00189383 |
| Volume Number | 60 |
| Issue Number | 7 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-07-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | through silicon via (TSV) 3-D integrated circuit (IC) keep-out zone (KOZ) mobility stress |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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