NDLI: Development of All-CSD Processes for Coated Conductors at Nexans: Limitations and Possible Solutions

Content Provider	IEEE Xplore Digital Library
Author	Rikel, M.O. Ehrenberg, J. Mahachi, S. Klein, M. Hoppe, B. Schutz, J. Bock, J.
Copyright Year	2002
Abstract	Nexans experience in developing all CSD processes for coated conductors with the YBCO/CGO/LZO/Ni-5% W RABITS architecture is summarized. The chosen CC architecture has a principal disadvantage that the next layer only clones, but more often deteriorates the out-of-plane texture of the previous layer (in average by ~ 20% for LZO). Depending on the quality of RABITS, this may increase the amount of grain boundaries (GBs) not transparent for the supercurrent close to the percolation limit for the current-breaking path, which explains low and poorly reproducible J_c. Modifying the buffer architecture by introducing CGO seed layer suppresses deterioration of the out-of-plane texture. Another approach, extending the range of acceptable grain misorientations by selective doping YBCO GBs with Ca is shown not possible using the current MOD-TFA process because of decomposition of initial Y123 to disordered Y124 and Y247 during pyrolysis of the second MOD layer. Possible ways of further development are discussed.
Sponsorship	Council on Superconductivity Appl. Superconductivity Conference Inc MIT
Starting Page	2928
Ending Page	2932
Page Count	5
File Size	561722
File Format	PDF
ISSN	10518223
Volume Number	21
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-06-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Yttrium barium copper oxide Epitaxial growth Conductors Substrates Humidity Buffer layers X-ray scattering percolation behavior All-CSD process epitaxial layers
Content Type	Text
Resource Type	Article
Subject	Condensed Matter Physics Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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