NDLI: Enabling preemptive multiprogramming on GPUs

Please wait, while we are loading the content...

Volume 42, Issue 5, December 2014

Volume 42, Issue 4, Setember 2014

Volume 42, Issue 3, June 2014

Unifying on-chip and inter-node switching within the Anton 2 network

Avoiding core's DUE & SDC via acoustic wave detectors and tailored error containment and recovery

The Direct-to-Data (D2D) cache

Fine-grain task aggregation and coordination on GPUs

Efficient digital neurons for large scale cortical architectures

Memory persistency

Towards energy proportionality for large-scale latency-critical workloads

Row-buffer decoupling

Architecture implications of pads as a scarce resource

The CHERI capability model

General-purpose code acceleration with limited-precision analog computation

A reconfigurable fabric for accelerating large-scale datacenter services

Enabling preemptive multiprogramming on GPUs

An examination of the architecture and system-level tradeoffs of employing steep slope devices in 3D CMPs

Reducing access latency of MLC PCMs through line striping

Increasing off-chip bandwidth in multi-core processors with switchable pins

The dirty-block index

Single-graph multiple flows

Optimizing virtual machine consolidation performance on NUMA server architecture for cloud workloads

Flipping bits in memory without accessing them

A low power and reliable charge pump design for phase change memories

Eliminating redundant fragment shader executions on a mobile GPU via hardware memoization

Real-world design and evaluation of compiler-managed GPU redundant multithreading

Harnessing ISA diversity

Going vertical in memory management

Replay debugging

Improving the energy efficiency of big cores

Volume 42, Issue 2, May 2014

Volume 42, Issue 1, March 2014

Enabling preemptive multiprogramming on GPUs

Content Provider	ACM Digital Library
Author	Cabezas, Javier Gelado, Isaac Ramirez, Alex Valero, Mateo Navarro, Nacho Tanasic, Ivan
Abstract	GPUs are being increasingly adopted as compute accelerators in many domains, spanning environments from mobile systems to cloud computing. These systems are usually running multiple applications, from one or several users. However GPUs do not provide the support for resource sharing traditionally expected in these scenarios. Thus, such systems are unable to provide key multiprogrammed workload requirements, such as responsiveness, fairness or quality of service. In this paper, we propose a set of hardware extensions that allow GPUs to efficiently support multiprogrammed GPU workloads. We argue for preemptive multitasking and design two preemption mechanisms that can be used to implement GPU scheduling policies. We extend the architecture to allow concurrent execution of GPU kernels from different user processes and implement a scheduling policy that dynamically distributes the GPU cores among concurrently running kernels, according to their priorities. We extend the NVIDIA GK110 (Kepler) like GPU architecture with our proposals and evaluate them on a set of multiprogrammed workloads with up to eight concurrent processes. Our proposals improve execution time of high-priority processes by 15.6x, the average application turnaround time between 1.5x to 2x, and system fairness up to 3.4x
Starting Page	193
Ending Page	204
Page Count	12
File Format	PDF
ISSN	01635964
DOI	10.1145/2678373.2665702
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	42
Issue Number	3
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in