NDLI: General-purpose code acceleration with limited-precision analog computation

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Efficient digital neurons for large scale cortical architectures

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Row-buffer decoupling

Architecture implications of pads as a scarce resource

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General-purpose code acceleration with limited-precision analog computation

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Real-world design and evaluation of compiler-managed GPU redundant multithreading

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Improving the energy efficiency of big cores

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Volume 42, Issue 1, March 2014

General-purpose code acceleration with limited-precision analog computation

Content Provider	ACM Digital Library
Author	Yazdanbakhsh, Amir Ceze, Luis Thwaites, Bradley Hassibi, Arjang Esmaeilzadeh, Hadi Burger, Doug St. Amant, Renée Park, Jongse
Abstract	As improvements in per-transistor speed and energy efficiency diminish, radical departures from conventional approaches are becoming critical to improving the performance and energy efficiency of general-purpose processors. We propose a solution--from circuit to compiler-that enables general-purpose use of limited-precision, analog hardwareto accelerate "approximable" code---code that can tolerate imprecise execution. We utilize an algorithmic transformation that automatically converts approximable regions of code from a von Neumann model to an "analog" neural model. We outline the challenges of taking an analog approach, including restricted-range value encoding, limited precision in computation, circuit inaccuracies, noise, and constraints on supported topologies. We address these limitations with a combination of circuit techniques, a hardware/software interface, neuralnetwork training techniques, and compiler support. Analog neural acceleration provides whole application speedup of 3.7x and energy savings of 6.3x with quality loss less than 10% for all except one benchmark. These results show that using limited-precision analog circuits for code acceleration, through a neural approach, is both feasible and beneficial over a range of approximation-tolerant, emerging applications including financial analysis, signal processing, robotics, 3D gaming, compression, and image processing
Starting Page	505
Ending Page	516
Page Count	12
File Format	PDF
ISSN	01635964
DOI	10.1145/2678373.2665746
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	42
Issue Number	3
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article

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