NDLI: One instruction set computer with optimised polarity-tunable model of double gate CNTFETs

Content Provider	IET Digital Library
Author	Ponnayan, Reena Monica Thazhathu, Sreedevi Vellithiruthi
Abstract	Emerging devices such as double gate carbon nanotube field effect transistors (DG CNTFETs) have opened up manifold possibilities for reconfigurable logic design. The thickness of gate oxide and the employment of inhomogeneous dielectrics over and under the carbon nanotubes (CNTs) impact the operation of DG CNTFETs. In this work, the dielectric constant and the thickness of the gate oxide are optimised to suppress the ambipolar conduction in CNTFETs. A multi-objective genetic algorithm-based approach is proposed to optimise these parameters. The contributions in this study are two-fold: firstly, a DG CNTFET is fabricated with the optimised parameters. By exploiting the ability to select the conduction behaviour using a second gate in the fabricated DG CNTFETs, the device is electrostatically programmed to behave as an n or p-type CNTFET. Secondly, a one instruction set computer is simulated with the optimised model of DG CNTFET. A universal static logic cell which implements 16 logic functions, a D-Latch and a D-FF were built with DG CNTFETs. The logic circuits with polarity-tunable DG CNTFETs outperform other logic structures. There is a 40% betterment in performance primarily due to the reduced number of logic levels and by 25% due to the reduced delay.
Starting Page	770
Ending Page	779
Page Count	10
ISSN	1751858X
Volume Number	14
e-ISSN	17518598
Issue Number	Issue 6, Sep (2020)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/14/6
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2019.0143
Journal	IET Circuits, Devices & Systems
Publisher Date	2020-03-25
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Ambipolar Conduction Carbon Nanotube Field Effect Transistors D-flip Flops D-latch Design And Testing Dielectric Constant Dielectric Material And Property Double Gate Carbon Nanotube Field Effect Transistors Double Gate CNTFET Equivalent Circuit Fabricated DG CNTFET Field Effect Device Flip Flops Fullerene Gate Oxide Genetic Algorithm Inhomogeneous Dielectrics Logic Circuit Logic Function Multiobjective Genetic Algorithm Nanotube And Related Device One Instruction Set Computer Optimisation Technique Optimised Polarity-tunable Model P-type CNTFET Photonic Technology Polarity-tunable DG CNTFET Reconfigurable Logic Design Semiconductor Device Model Semiconductor Device Modelling Universal Static Logic Cell
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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An universal logic-circuit with flip flop circuit based on DG-CNTFET

An efficient gate library for ambipolar cntfet logic.

Gate dielectric constant engineering for suppression of ambipolar conduction in CNTFETs

Ambipolar double gate CNTFETs based reconfigurable Logic cells

Modeling and Performance Investigation of the Double-Gate Carbon Nanotube Transistor

Fabrication of high-performance carbon nanotube field-effect transistors (CNTFETs) and CNTFET-based electronic circuits with semiconductors as the source/drain contact materials

Performance and electrical characteristics of hybrid carbon nanotube field effect transistors

Construction of Logic Gate Based on Multi-channel Carbon Nanotube Field-Effect Transistors

Comparative analysis of carbon nanotube field effect transistors

One instruction set computer with optimised polarity-tunable model of double gate CNTFETs

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