NDLI: New mixed-mode second-generation voltage conveyor based first-order all-pass filter

Content Provider	IET Digital Library
Author	Yuce, Erkan Safari, Leila Minaei, Shahram Ferri, Giuseppe Stornelli, Vincenzo
Abstract	A new plus-type second-generation voltage conveyor (VCII+) based first-order mixed-mode (MM) all-pass (AP) filter is proposed in this study. The proposed MM AP filter employs two VCII+s, three resistors and one grounded capacitor. It has low input and high output impedances for the current-mode selection while it has low input and low output impedances for the transimpedance-mode selection. The AP filter gain is unity for the current output while it is adjustable for the voltage output via a grounded resistor. However, a single passive component matching condition is needed for the proposed MM AP filter. Complete non-ideal analysis by taking into account all the parasitic resistors and non-ideal gains of the VCII+ is performed. The presented theory is verified through SPICE simulations by using supply voltage of ± 0.9 V and 0.18 μm Taiwan Semiconductor Manufacturing Company complementary metal oxide semiconductor technology parameters.
Starting Page	901
Ending Page	907
Page Count	7
ISSN	1751858X
Volume Number	14
e-ISSN	17518598
Issue Number	Issue 6, Sep (2020)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/14/6
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2019.0469
Journal	IET Circuits, Devices & Systems
Publisher Date	2020-07-22
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Active Filter Active Network All Pass Filter AP Filter Gain Capacitor CMOS Integrated Circuit Current Conveyors Current-mode Circuit Current-mode Selection First-order Mixed-mode All-pass Filter Grounded Capacitor Grounded Resistor High Output Impedance Low Output Impedance Mixed-mode Second-generation Voltage Conveyor MM AP Filter Parasitic Resistors Plus-type Second-generation Voltage Conveyor Resistor Single Passive Component Matching Condition Size 0.18 Mum SPICE Simulations Taiwan Semiconductor Manufacturing Company Complementary Metal Oxide Semiconductor Technology Parameter Transimpedance-mode Selection VCII+
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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