NDLI: Carbon nanotube FET-based low-delay and low-power multi-digit adder designs

Content Provider	IET Digital Library
Author	Srinivasu, B. Sridharan, K.
Abstract	Several field-effect transistor (FET)-based device technologies are emerging as powerful alternatives to the classical metal oxide semiconductor FET (MOSFET) for computing applications. The focus of this study is on arithmetic circuit design in carbon nanotube FET (CNTFET) technology. In particular, the authors develop low-delay and low-power multi-ternary digit CNTFET-based adder designs. The proposed designs are based on unary operators of multi-valued logic. Efficient designs for primitives such as ternary half-adder (HA) and full-adder are developed and they are used to obtain low-complexity multi-digit adders based on the notions of conditional sum and carry lookahead. Extensive HSPICE simulations reveal that the power-delay product of the proposed CNTFET-based HA and full-adder are roughly 20 and 50%, respectively, of that of recent designs. Further, the proposed CNTFET-based conditional sum adder has a power-delay product of approximately 27% of that of a multi-trit design derived from a recent single-trit adder design (for a load capacitance of 2 fF). Moreover, the proposed CNTFET-based carry lookahead adder has low delay in comparison with the conditional sum strategy for different supply voltages. Studies on robustness of the designs are also reported.
Starting Page	352
Ending Page	364
Page Count	13
ISSN	1751858X
Volume Number	11
e-ISSN	17518598
Issue Number	Issue 4, Jul (2017)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/11/4
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2016.0013
Journal	IET Circuits, Devices & Systems
Publisher Date	2016-11-11
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Adder Arithmetic Circuit Design Carbon Nanotube FET Carbon Nanotube Field Effect Transistors CNTFET Technology CNTFET-based Carry Lookahead Adder CNTFET-based Conditional Sum Adder CNTFET-based Full-adder CNTFET-based HA Conditional Sum-carry Lookahead Digital Circuit Design, Modelling And Testing Extensive HSPICE Simulations Field Effect Device Field-effect Transistor-based Device Technology Fullerene Logic And Switching Circuit Logic Circuit Logic Design Method Low Power Electronics Low-complexity Multidigit Adders Low-delay Low-power Multidigit Adder Design Metal Oxide Semiconductor FET MOSFET Multiternary Digit CNTFET-based Adder Design Multitrit Design Multivalued Logic Nanotube And Related Device Power-delay Product Single-trit Adder Design Ternary Half-adder Ternary Logic Unary Operators
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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