NDLI: Capacitor-less FVF low drop-out regulator with active feed-forward compensation and efficient slew-rate enhancer circuit

Content Provider	IET Digital Library
Author	Pappiah, Manikandan Boby, Bindu
Abstract	In this study, an improved capacitor-less flipped voltage follower (FVF) low drop-out regulator (LDO) with active feed-forward compensation (AFFC) and an efficient slew-rate enhancer (SRE) circuit is presented. In capacitor-less FVF LDOs, the dominant pole is placed at the gate of the power metal oxide semiconductor field effect transistor (MOSFET) which demands minimum load current for the feedback-loop to be stable. The proposed compensator has miller compensation along with AFFC which helps to eliminate the minimum load demand for the feedback-loop of the LDO to be stable by shifting the right half-plane (RHP) zero of power MOSFET to left half-plane (LHP) zero. This LHP zero proportionally varies with the first non-dominant pole at the output of the LDO as the load current varies from light load to heavy load and extends the unity gain frequency of the proposed LDO. The SRE circuit supports fast load transients with edge time of 50 ns and achieves less voltage spike without consuming any power at steady-state. This LDO is implemented in 0.18 μ m technology with a drop-out voltage of 200 mV and can drive the load current range of 0–50 mA with regulated output voltages from 1.2 to 1.6 V. It settles faster with the settling time of 250 ns and has the quiescent current of 25.8 μ A .
Starting Page	853
Ending Page	859
Page Count	7
ISSN	1751858X
Volume Number	14
e-ISSN	17518598
Issue Number	Issue 6, Sep (2020)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/14/6
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2019.0495
Journal	IET Circuits, Devices & Systems
Publisher Date	2020-05-26
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Active Feed-forward Compensation Amplifiers Capacitor-less FVF LDO Capacitor-less FVF Low Drop-out Regulator CMOS Integrated Circuit Current 0.0 MA to 50.0 MA Current 25.8 MuA Dominant Pole Drop-out Voltage Efficient Slew-rate Enhancer Circuit Feedback-loop Improved Capacitor-less Flipped Voltage Follower Insulated Gate Field Effect Transistors LHP Zero Load Current Range Load Transients Miller Compensation Minimum Load Demand Nondominant Pole Operational Amplifier Power Electronics Power MOSFET Power Semiconductor Device Power Supply Regulated Output Voltage Size 0.18 Mum SRE Circuit Supervisory Circuit Time 250.0 Ns Time 50.0 Ns Transient Response Voltage 1.2 V to 1.6 V Voltage 200.0 MV Voltage Control Voltage Regulators Voltage Spike
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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