NDLI: Methodology of automation process of wafer tests

Content Provider	IEEE Xplore Digital Library
Author	Krzyzanowska, A. Maj, P. Grybos, P. Szczygiel, R. Koziol, A.
Copyright Year	2015
Description	Author affiliation: Dept. of Meas. & Electron., AGH Univ. of Sci. & Technol., Cracow, Poland (Krzyzanowska, A.; Maj, P.; Grybos, P.; Szczygiel, R.; Koziol, A.)
Abstract	The paper presents a highly efficient system for automated wafer testing implemented on a single software platform. Building fully functional device requires often expensive and time consuming, manufacturing steps. Thus, the ASICs on the wafer ought to be tested in advance to ensure that only the chips with no manufacturing defects will be used in the further process. The presented testing system was used for the tests of the readout chip for hybrid pixel detectors working in a single photon counting mode. The aim of the system is to detect both digital and analog blocks' issues that might cause incorrect chip functioning. The system setup, software implementation, the methodology and the choice of the tests performed are described.
Starting Page	530
Ending Page	533
File Size	606480
Page Count	4
File Format	PDF
e-ISBN	9788363578077
DOI	10.1109/MIXDES.2015.7208579
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-25
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	Department of Microelectronics and Computer Science, Lodz Univeristy of Technology
Subject Keyword	IC tests optimization Power supplies automated wafer test ASICs tests Detectors Software Probes Testing Photonics wafer probe test
Content Type	Text
Resource Type	Article

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