NDLI: P5E-4 3D Transient Analysis of Ultrasound Propagation Using Finite Difference Time Domain Method and Its Experimental Verification

Content Provider	IEEE Xplore Digital Library
Author	Yalcin Yamaner, F. Bozkurt, A.
Copyright Year	2007
Description	Author affiliation: Sabanci Univ., Istanbul (Yalcin Yamaner, F.; Bozkurt, A.)
Abstract	Advances in cMUT technology accelerated research efforts in the design of driver/receiver front-end integrated circuits (ICs) for transducer arrays. Considering ASIC manufacturing costs and turn-around times, a thorough assessment of the front-end circuit before tape-out is compulsory. For an accurate evaluation, circuit simulations have to be run on a system-level model that includes the post-layout extracted netlist of the IC and an equivalent circuit for the transducers pulse-echo behavior. In this paper, we present the modeling, design and test of a front-end IC for 2D cMUT arrays. To evaluate the circuit response, we first developed a pulse-echo model for an array element. The model is a modified version of the Mason Equivalent Circuit where the radiation impedance term has been replaced by an RLC network to include the effects of finite transducer size and diffraction loss. The model has been verified by running transient FEA simulations using ANSYS. Meanwhile, we designed a driver/receiver front-end circuit for a 2D cMUT array element. The circuit was composed of a high voltage (50 Volt) pulse driver, an NMOS protection switch and a trans-impedance amplifier. We then used the transducer model to simulate the response of the front-end circuit using Cadence Spectre. The simulation results are then verified by comparing them to experimental data obtained from the manufactured front-end IC. We demonstrated that information obtained from a model describing the behavior of the front-end circuit together with the transducer element is consistent with the experimental data and hence can be used to assess system performance.
Starting Page	2295
Ending Page	2298
File Size	302653
Page Count	4
File Format	PDF
ISBN	9781424413836
ISSN	10510117
DOI	10.1109/ULTSYM.2007.577
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-10-28
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Transient analysis Ultrasonic imaging Finite difference methods Time domain analysis RLC circuits Integrated circuit modeling Circuit simulation Transducers Driver circuits Pulse circuits
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in