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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Xinying Wang Jones, P. Zambreno, J. |
| Copyright Year | 2014 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA (Xinying Wang; Jones, P.; Zambreno, J.) |
| Abstract | QR decomposition has been widely used in many signal processing applications to solve linear inverse problems. However, QR decomposition is considered a computationally expensive process, and its sequential implementations fail to meet the requirements of many time-sensitive applications. The Householder transformation and the Givens rotation are the most popular techniques to conduct QR decomposition. Each of these approaches have their own strengths and weakness. The Householder transformation lends itself to efficient sequential implementation, however its inherent data dependencies complicate parallelization. On the other hand, the structure of Givens rotation provides many opportunities for concurrency, but is typically limited by the availability of computing resources. We propose a deeply pipelined reconfigurable architecture that can be dynamically configured to perform either approach in a manner that takes advantage of the strengths of each. At runtime, the input matrix is first partitioned into numerous sub-matrices. Our architecture then performs parallel Householder transformations on the sub-matrices in the same column block, which is followed by parallel Givens rotations to annihilate the remaining unneeded individual off-diagonals. Analysis of our design indicates the potential to achieve a performance of 10.5 GFLOPS with speedups of up to 1.46fiX, 1.15Xfi and 13.75fiX compared to the MKL implementation, a recent FPGA design and a Matlab solution, respectively. |
| Sponsorship | IEEE Comput. Soc. |
| Starting Page | 541 |
| Ending Page | 546 |
| File Size | 617508 |
| Page Count | 6 |
| File Format | |
| e-ISBN | 9781479937653 |
| DOI | 10.1109/ISVLSI.2014.92 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-07-09 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Matrix decomposition Vectors Computer architecture Field programmable gate arrays Parallel processing Adders MATLAB Givens rotation Architecture FPGA QR decomposition Householder transformation |
| Content Type | Text |
| Resource Type | Article |
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