Please wait, while we are loading the content...
| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Phanibhushana, B. Kundu, S. |
| Copyright Year | 2014 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., Univ. of Massachusetts Amherst, Amherst, MA, USA (Phanibhushana, B.; Kundu, S.) |
| Abstract | With burgeoning growth of mobile systems, multiprocessor System-on-Chip (MPSoC) connected via Network-on-Chip (NoC) has become ubiquitous. A typical MPSoC in mobile applications consists of multiple CPU cores of varying capabilities, GPU cores, DSP cores, and crypto accelerators and such cores differ widely in their physical size and their bandwidth requirements. Traditional mesh based NoC systems work well for regular structures, but do not map well to heterogeneous MPSoCs. In MPSoC programming model, an application consists of tasks, that represent a unit of work on a core which can be executed asynchronously. The communication between tasks is represented in the form of a directed acyclic graph. The temporal burstness of data which arise from programming model provide opportunity for multiplexing communication between cores, which may be advantageous in reducing network size. Often a task graph needs to meet a real-time deadline. The actual execution time may vary based on the application data. The uncertainty in the execution time may be modeled by a statistical distribution, which further complicates the NoC design. In this paper, we present a synthesis method for hierarchical design of NoC for a given task graph system deadline, that optimizes for router area. A 2-phase design flow is proposed, which consists of topology generation and statistical analysis in an iterative loop. We adopt proportion of Monte-Carlo test cases that meet the deadline as a metric for goodness. The proposed solution is compared against static design approach and simulated annealing (SA) based network generation. On an average, a performance benefit of 10% over SA, 16% over standard mesh and 30% over static design was obtained and a total router area benefit of 59% over SA, 48% over mesh and 55% over static design was observed. |
| Sponsorship | IEEE Comput. Soc. |
| Starting Page | 486 |
| Ending Page | 491 |
| File Size | 612704 |
| Page Count | 6 |
| File Format | |
| e-ISBN | 9781479937653 |
| DOI | 10.1109/ISVLSI.2014.96 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-07-09 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Partitioning algorithms Bandwidth Topology System-on-chip Monte Carlo methods Algorithm design and analysis Cost function Kernighan-Lin Network-on-chip Realtime systems Statistical design |
| Content Type | Text |
| Resource Type | Article |
National Digital Library of India (NDLI) is a virtual repository of learning resources which is not just a repository with search/browse facilities but provides a host of services for the learner community. It is sponsored and mentored by Ministry of Education, Government of India, through its National Mission on Education through Information and Communication Technology (NMEICT). Filtered and federated searching is employed to facilitate focused searching so that learners can find the right resource with least effort and in minimum time. NDLI provides user group-specific services such as Examination Preparatory for School and College students and job aspirants. Services for Researchers and general learners are also provided. NDLI is designed to hold content of any language and provides interface support for 10 most widely used Indian languages. It is built to provide support for all academic levels including researchers and life-long learners, all disciplines, all popular forms of access devices and differently-abled learners. It is designed to enable people to learn and prepare from best practices from all over the world and to facilitate researchers to perform inter-linked exploration from multiple sources. It is developed, operated and maintained from Indian Institute of Technology Kharagpur.
Learn more about this project from here.
NDLI is a conglomeration of freely available or institutionally contributed or donated or publisher managed contents. Almost all these contents are hosted and accessed from respective sources. The responsibility for authenticity, relevance, completeness, accuracy, reliability and suitability of these contents rests with the respective organization and NDLI has no responsibility or liability for these. Every effort is made to keep the NDLI portal up and running smoothly unless there are some unavoidable technical issues.
Ministry of Education, through its National Mission on Education through Information and Communication Technology (NMEICT), has sponsored and funded the National Digital Library of India (NDLI) project.
| Sl. | Authority | Responsibilities | Communication Details |
|---|---|---|---|
| 1 | Ministry of Education (GoI), Department of Higher Education |
Sanctioning Authority | https://www.education.gov.in/ict-initiatives |
| 2 | Indian Institute of Technology Kharagpur | Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project | https://www.iitkgp.ac.in |
| 3 | National Digital Library of India Office, Indian Institute of Technology Kharagpur | The administrative and infrastructural headquarters of the project | Dr. B. Sutradhar bsutra@ndl.gov.in |
| 4 | Project PI / Joint PI | Principal Investigator and Joint Principal Investigators of the project |
Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon |
| 5 | Website/Portal (Helpdesk) | Queries regarding NDLI and its services | support@ndl.gov.in |
| 6 | Contents and Copyright Issues | Queries related to content curation and copyright issues | content@ndl.gov.in |
| 7 | National Digital Library of India Club (NDLI Club) | Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach | clubsupport@ndl.gov.in |
| 8 | Digital Preservation Centre (DPC) | Assistance with digitizing and archiving copyright-free printed books | dpc@ndl.gov.in |
| 9 | IDR Setup or Support | Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops | idr@ndl.gov.in |
|
Loading...
|