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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Fukuda, T. Kohara, K. Dozaka, T. Takeyama, Y. Midorikawa, T. Hashimoto, K. Wakiyama, I. Miyano, S. Hojo, T. |
| Copyright Year | 2014 |
| Description | Author affiliation: Toshiba Microelectron., Kawasaki, Japan (Hashimoto, K.; Wakiyama, I.) || Toshiba, Kawasaki, Japan (Fukuda, T.; Kohara, K.; Dozaka, T.; Takeyama, Y.; Midorikawa, T.; Miyano, S.; Hojo, T.) |
| Abstract | Battery lifetime is the key feature in the growing markets of sensor networks and energy-management system (EMS). Low-power MCUs are widely used in these systems. For these applications, standby power, as well as active power, is important contributor to the total energy consumption because active sensing or computing phases are much shorter than the standby state. Figure 13.4.1 shows a typical power profile of low-power MCU applications. To achieve many years of battery lifetime, the power consumption of the chip must be kept below 1μA during deep sleep mode. Another key feature of a low-power MCU for such applications is fast wake-up from deep-sleep mode, which is important for low application latency and to keep wake-up energy minimal. For fast wake-up, the system must retain its state and logged information during sleep mode because several-hundred microseconds are needed for reloading such data to memories. Conventional SRAM consumes much higher retention current than the required deep-sleep-mode current as shown in Fig. 13.4.1. Embedded Flash memories have limited write endurance on the order of $10^{5}$ cycles making them difficult to use in applications that frequently power down. Embedded FRAM [1,2] has been used for this purpose and it could be used as a random-access memory as well as a nonvolatile memory. However, as a random-access memory, its slow operation and high energy consumption [1,2] limits performance of the MCU and battery lifetime. Furthermore, additional process steps for fabricating FRAM memory cells increase the cost of MCU. SRAM can operate at higher speed with lower energy without additional process steps, but high retention current makes it difficult to sustain data in deep-sleep mode. To solve this problem, we develop low-leakage current SRAM (XLL SRAM) that reduce retention current by 1000× compared to conventional SRAM and operate with less than 10ns access time. The retention current of XLL SRAM is negligible in the deep-sleep mode because it is much smaller than the amount of the deep-sleep-mode current of MCU, which is dominated by active current of the real-time clock and control logic circuits. By using XLL SRAM, the store and reload process during mode transitions can be eliminated and wake-up time from deep-sleep mode of MCU is reduced to few microseconds. This paper describes a 128kb SRAM with 3.5nA (27fA/b) retention current, 7ns access time, and 25μW/MHz active energy consumption. Its low retention current, high-speed, and low-power operation enable to activate SRAM in the deep-sleep mode, and also provides fast wake-up, low active energy consumption and high performance to MCU. |
| Starting Page | 236 |
| Ending Page | 237 |
| File Size | 1206185 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781479909186 |
| ISSN | 01936530 |
| e-ISBN | 9781479909209 |
| DOI | 10.1109/ISSCC.2014.6757415 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-02-09 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Random access memory Leakage currents Transistors Logic gates Energy consumption Nonvolatile memory Batteries |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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