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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chen Xu Jingyan Zhang Lixin Zhao Jun Deng Changbao Tao Guo Gao Jinyu Du Ji Luo Deshu Zou Jianxin Chen Guangdi Shen |
| Copyright Year | 1998 |
| Description | Author affiliation: Dept. of Electron. Eng., Beijing Polytech. Univ., China (Chen Xu) |
| Abstract | Ion implantation and the side-wall oxide self-aligned technique was used to reduce the extrinsic base resistance of a SiGe HBT. The sheet resistance of the SiGe layer was reduced over 20 times under proper implantation and annealing parameters, and ohmic contacting was also improved. This can greatly enhance the frequency performance and reduce the noise figure of SiGe HBT. The SiGe sheet resistance is sensitive to the implantation and annealing parameters. For our samples an implantation dose of 10/sup 16//cm/sup 3/ and energy of 35 kev, annealing temperature from 960/spl deg/C to 1000/spl deg/C is suitable. |
| Starting Page | 776 |
| Ending Page | 779 |
| File Size | 202129 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780343069 |
| DOI | 10.1109/ICSICT.1998.786135 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1998-10-23 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Silicon germanium Germanium silicon alloys Heterojunction bipolar transistors Ion implantation Frequency Noise figure Noise reduction Contact resistance Doping profiles Annealing |
| Content Type | Text |
| Resource Type | Article |
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