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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Boncalo, O. Udrescu, M. Prodan, L. Vladutiu, M. Amaricai, A. |
| Copyright Year | 2008 |
| Description | Author affiliation: Comput. Sci. & Eng. Dept., "Politeh." Univ. of Timisoara, Odense (Boncalo, O.; Udrescu, M.; Prodan, L.; Vladutiu, M.; Amaricai, A.) |
| Abstract | This paper presents a flexible VHDL simulation framework, meant to analyze the link between the adopted noise model and the quantum circuit fidelity. The key ingredient is the use of fault injection components (i.e. mutants and saboteurs), which are tailored according to the noise model. The evaluation of quantum fault tolerant (FT) schemes is dominated by analytical studies, mostly restricted to independent probabilistic faults. The model adopted herein addresses general noise, which includes: probabilistic faults, amplitude errors, depolarization, amplitude damping, and phase damping. This way, we show that a rigorous CAD analysis for lower levels of FT schemes can be performed. The results can then be used to tune up simulation or analytical parameters for the higher levels. The target of our simulations is a particular quantum network, responsible for generating and verifying the encoded ancilla state $|^{0}rang_{F}$ . |
| Starting Page | 625 |
| Ending Page | 628 |
| File Size | 361047 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424421039 |
| DOI | 10.1109/NANO.2008.187 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-08-18 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Noise Integrated circuit modeling Circuit faults Logic gates Damping Fault location Solid modeling |
| Content Type | Text |
| Resource Type | Article |
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