NDLI: Dynamic platform management for configurable platform-based System-on-Chips

Content Provider	IEEE Xplore Digital Library
Author	Sekar, Krishna Lahiri, K. Dey, S.
Copyright Year	2003
Description	Author affiliation: Dept. of Electr. & Comput. Eng., California Univ., La Jolla, CA, USA (Krishna Sekar; Lahiri, K.; Dey, S.)
Abstract	General-purpose System-on-Chip platforms consisting of configurable components are emerging as an attractive alternative to traditional, customized solutions (e.g., ASICs, custom SoCs), owing to their flexibility, time-to-market advantage, and low engineering costs. However, the adoption of such platforms in many high-volume markets (e.g. wireless handhelds) is limited by concerns about their performance and energy-efficiency. This paper addresses the problem of enabling the use of configurable platforms in domains where custom approaches have traditionally been used. We introduce Dynamic Platform Management, a methodology for customizing a configurable general-purpose platform at run-time, to help bridge the performance and energy efficiency gap with custom approaches. The proposed technique uses a software layer that detects time-varying processing requirements imposed by a set of applications, and dynamically optimizes architectural parameters and platform components. Dynamic platform management enables superior application performance, more efficient utilization of platform resources, and improved energy efficiency, as compared to a statically optimized platform, without requiring any modifications to the underlying hardware. We illustrate dynamic platform management by applying it to the design of a dual-access UMTS/WLAN security processing system, implemented on a general-purpose configurable platform. Experiments demonstrate that, compared to a statically optimized design (on the same platform), the proposed techniques enable upto 33% improvements in security processing throughput, while achieving 59% savings in energy consumption (on average).
Sponsorship	IEEE IEEE Circuits and Syst. Soc. IEEE Comput. Soc. ACM Special Interest Group on Design Automation
Starting Page	641
Ending Page	648
File Size	731429
Page Count	8
File Format	PDF
ISBN	1581137621
DOI	10.1109/ICCAD.2003.159748
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-11-09
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	System-on-a-chip Energy efficiency Energy management Application software Security Time to market Power engineering and energy Costs Runtime Bridges
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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