NDLI: Path delay estimation using power supply transient signals: a comparative study using Fourier and wavelet analysis

Content Provider	IEEE Xplore Digital Library
Author	Singh, A. Tharian, J. Plusquellic, J.
Copyright Year	2003
Description	Author affiliation: Dept. of Comput. Eng., Maryland Univ., Baltimore, MD, USA (Singh, A.; Tharian, J.; Plusquellic, J.)
Abstract	Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (i/sub DDT/) drawn by the core logic from the power supply pads in a CMOS digital circuit. In previous work, we develop a test procedure that can be used both to detect signal variations caused by defects and to obtain delay information in defect free chips. Phase spectra of transient signals obtained using discrete Fourier transform are shown to track path delays of defect-free chips under a wide range of process variations. However, in recent work, we were able to demonstrate through simulation experiments incorporating deep submicron transistor models, a circuit design and path sensitization scenario in which our existing TSA method is not able to yield accurate predictions of path delays. More specifically, a circuit composed of two inverter chains constructed with widely varying transistor sizes was shown to produce path delays that were weakly correlated across a set of worst case process models. In this paper, an alternative wavelet-based analysis of i/sub DDT/ waveforms is shown to improve the accuracy of predicting multiple path delays under these conditions.
Sponsorship	IEEE IEEE Circuits and Syst. Soc. IEEE Comput. Soc. ACM Special Interest Group on Design Automation
Starting Page	748
Ending Page	753
File Size	479491
Page Count	6
File Format	PDF
ISBN	1581137621
DOI	10.1109/ICCAD.2003.159760
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-11-09
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Delay estimation Power supplies Transient analysis Wavelet analysis Signal analysis Circuit testing CMOS logic circuits Logic testing Predictive models Logic devices
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis

Path delay estimation using power supply transient signals: a comparative study using fourier and wavelet analysis.

Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis

Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis

Defect detection using power supply transient signal analysis

Power supply transient signal analysis under real process and test hardware models

Sensitivity analysis to hardware Trojans using power supply transient signals

Pass-transistor adiabatic logic using single power-clock supply

An accurate and efficient multiple delay simulator for MOS logic circuits using polynomial approximation

Path delay estimation using power supply transient signals: a comparative study using Fourier and wavelet analysis

Similar Documents

Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis

Path delay estimation using power supply transient signals: a comparative study using fourier and wavelet analysis.

Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis

Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis

Defect detection using power supply transient signal analysis

Power supply transient signal analysis under real process and test hardware models

Sensitivity analysis to hardware Trojans using power supply transient signals

Pass-transistor adiabatic logic using single power-clock supply

An accurate and efficient multiple delay simulator for MOS logic circuits using polynomial approximation

Path delay estimation using power supply transient signals: a comparative study using Fourier and wavelet analysis