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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Lei Yang Shi, C.-J.R. |
| Copyright Year | 2003 |
| Description | Author affiliation: Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA (Lei Yang; Shi, C.-J.R.) |
| Abstract | This paper presents FROSTY, a computer program for automatically extracting the hierarchy of a large-scale digital CMOS circuit from its transistor-level netlist description and a library of subcircuits. To handle the complexity of industrial circuits, FROSTY combines traditional structural recognition and pattern matching methods into a two-step extraction process. First, gate structures based on channel-connected-components are recognized from a circuit netlist and library subcircuits. Then annotated graphs representing the connectivity and properties of gate structures are constructed. Comparing to transistor-level netlists, these graphs are much smaller in size, more distinguishable in structure, and are thus more suitable for labeling based pattern matching. An efficient pattern matching algorithm is applied to extract the circuit hierarchy from these condensed circuit graphs. FROSTY has been demonstrated to be orders of magnitude faster than the best known extraction program SubGemini, capable of extracting the entire hierarchy of industrial designs with several hundred thousand transistors in a few minutes on a Sun workstation. Further FROSTY is scale with the size of a circuit. |
| Sponsorship | IEEE IEEE Circuits and Syst. Soc. IEEE Comput. Soc. ACM Special Interest Group on Design Automation |
| Starting Page | 741 |
| Ending Page | 746 |
| File Size | 420768 |
| Page Count | 6 |
| File Format | |
| ISBN | 1581137621 |
| DOI | 10.1109/ICCAD.2003.159759 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2003-11-09 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Association for Computing Machinery, Inc. (ACM) |
| Subject Keyword | Circuit simulation CMOS digital integrated circuits Software libraries Labeling Integrated circuit interconnections Logic gates CMOS logic circuits Latches Circuit testing Permission |
| Content Type | Text |
| Resource Type | Article |
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