NDLI: A time-mode translinear principle for implementing analog multiplication

Content Provider	IEEE Xplore Digital Library
Author	D'Angelo, R. Sonkusale, S.
Copyright Year	2014
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Tufts Univ., Medford, MA, USA (D'Angelo, R.; Sonkusale, S.)
Abstract	Analog computation traditionally processes information as differences in voltage or current amplitudes. With technology scaling resulting in reduced headroom and limited dynamic range, time-mode computation has emerged as a viable approach for low-power high-precision analog signal processing. Time mode circuits use differences in time to represent information. So far, only linear relationships between voltage/current and time has been explored for applications in data conversion, frequency synthesis and signal processing. In this paper, we present a time-mode analog of the well-known “translinear” principle using linear RC circuits and exploiting the exponential relationship between voltage and time for step charging or discharging of the capacitor. We present basic circuit analysis and utilize the technique to implement a simple single quadrant analog multiplier in an 180nm CMOS process. At 1.8V supply, the multiplier consumes approximately 5mW for a sampling frequency of 100kHz and a maximum input peak-to-peak voltage swing of 0.8V. The average non-linearity error is 0.44%. The time mode translinear principle could facilitate high dynamic range, high precision, complex linear and nonlinear arithmetic and other signal processing functions.
Sponsorship	IEEE Circuits Syst. Soc.
Starting Page	73
Ending Page	76
File Size	1165628
Page Count	4
File Format	PDF
e-ISBN	9781479934324
DOI	10.1109/ISCAS.2014.6865068
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-06-01
Publisher Place	Australia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Dynamic range Capacitors Delays Signal processing Logic gates Adders
Content Type	Text
Resource Type	Article

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