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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Guthy, B.S. |
| Copyright Year | 1991 |
| Description | Author affiliation: Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA (Guthy, B.S.) |
| Abstract | If computer system main memory modules can be arranged so that they constitute several independently working modules, then it would allow overlapping of multiple memory accesses and the simultaneous sharing of memory among several processors and peripherals. To take full advantage of this parallelism, addresses must be distributed across the modules in a way that minimizes congestion. Functions of the form f: A to M, where A is the domain of addresses and M is the domain of module numbers, are called skewing functions. The correct choice of f can satisfy the need of minimal congestion. Skewing schemes of a particular type are shown to be similar to shift-folding hashing functions. A recent proposal by researchers at Rice University is extended and shown to be a shift-folding function. The scheme was evaluated using the codes from the Livermore Fortran kernels with the help of a general memory module simulator. The results seem to indicate a 50% utilization of the potential parallelism, in situations similar to this code where the programs are not fully vectorizable.< |
| Starting Page | 2324 |
| Ending Page | 2327 |
| File Size | 333752 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780300505 |
| DOI | 10.1109/ISCAS.1991.176843 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1991-06-11 |
| Publisher Place | Singapore |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Interleaved codes Circuits Throughput Decoding Delay |
| Content Type | Text |
| Resource Type | Article |
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