NDLI: Implementation of 'multiply-add' FFT algorithms for complex and real data sequences

Content Provider	IEEE Xplore Digital Library
Author	Lu, C.
Copyright Year	1991
Description	Author affiliation: Dept. of Comput. Sci., Towson State Univ., MD, USA (Lu, C.)
Abstract	Multiply-add FFT algorithms are FFT algorithms that take advantage of computer architectures with a multiply-add feature. Various FFT algorithms can be implemented on this type of architecture to give the multiplications for free. In the present work, some of these FFT algorithms are reviewed: the split-radix FFT algorithm for 2/sup k/ transform sizes, the multiplicative algorithms for prime transform sizes, and the prime factor algorithm for transform sizes with relatively prime factors. Both complex and real data sequences are considered, and operational counts are evaluated in terms of total floating-point operations. Tensor product formulation is used throughout for producing variants of algorithms matching to computer architecture.<>
Starting Page	480
Ending Page	483
File Size	325266
Page Count	4
File Format	PDF
ISBN	0780300505
DOI	10.1109/ISCAS.1991.176377
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1991-06-11
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computer architecture Reduced instruction set computing Digital signal processing chips Tensile stress Fourier transforms Delay effects Chaos Large-scale systems Algorithm design and analysis Workstations
Content Type	Text
Resource Type	Article

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