NDLI: A hardware architecture of MIMO-OFDM synchronizer

Content Provider	IEEE Xplore Digital Library
Author	Hao Xuefei Chen Jie
Copyright Year	2005
Description	Author affiliation: SOC Lab. of Microelectron. Inst., Chinese Acad. of Sci., Beijng, China (Hao Xuefei; Chen Jie)
Abstract	In this paper, a hardware architecture for MIMO-OFDM system synchronizer is presented. The proposed synchronization unit can achieve synchronization in the time-domain and frequency-domain. The time-domain synchronization can be achieved by a group of matched filters of ZCZ codes. Since MIMO-OFDM system have multiple transmitting antennas and multiple receiving antennas, every receiving antenna can receive the signal from all transmitting antennas. When the all sub-channels delay between receiving/transmitting antennas are different, every frame detection in receiving antennas is interfered from other transmitting preamble, the proposed matched filter of ZCZ code can solve the problem. On the other hand the synchronizer unit also perform the frequency offset estimation and correction with two long training symbol in the preamble. At last,the hardware architecture of synchronizer is given and implemented with EP20K1500E device of Altera's APEX DSP development board.
Starting Page	189
Ending Page	192
File Size	572482
Page Count	4
File Format	PDF
ISBN	0780392108
DOI	10.1109/ICASIC.2005.1611294
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-10-24
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Frequency synchronization Receiving antennas Transmitting antennas Frequency estimation Time domain analysis Matched filters OFDM MIMO Delay
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in