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Content Provider | IEEE Xplore Digital Library |
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Author | Calata, J.N. Guo-Quan Lu Luechinger, C. |
Copyright Year | 2002 |
Description | Author affiliation: Dept. of Mater. Sci. & Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA (Calata, J.N.; Guo-Quan Lu) |
Abstract | Electrical interconnection is an important part of device packaging. In packages of power semiconductor devices, wire bonding currently is the predominant interconnect technology; but other technologies such as flip chip, developed for IC chip packaging, and direct solder are being used in newly introduced products. The ever-increasing demand on performance and reliability of power electronics devices and systems has accelerated the research and development for interconnection and packaging. This project was initiated to objectively evaluate different technologies, commercial or developmental, in terms of performance, reliability, fabrication complexity and cost, with high sample-to-sample consistency and statistically significant sample sizes. Three interconnect technologies - wire bond, solder ball, and direct solder - were selected for the initial comparative study. Power devices were attached on direct bond copper (DBC) substrates of identical size, then interconnected by each of the three techniques into testable structures. Thermal cycling is performed under the JEDEC recommended conditions to allow cross-referencing with available data obtained under similar conditions. Monitoring will be done using nondestructive methods such as scanning acoustic microscopy and electrical tests. The procedures for the fabrication and evaluation of the test structures are presented, as are the preliminary experimental results obtained thus far. A description of the cost analysis methodology is also included. |
Sponsorship | Components, Packaging, & Manuf. Technol. Soc. IEEE (CPMT/IEEE) K-16 Committee on Electron. Cooling, Heat Transfer Div. ASME Electron. & Photonics & Packaging Div. (EPPD), ASME Int. Microelectron. & Packaging Soc. (IMAPS) |
Starting Page | 1089 |
Ending Page | 1096 |
File Size | 955354 |
Page Count | 8 |
File Format | |
ISBN | 0780371526 |
ISSN | 10899870 |
DOI | 10.1109/ITHERM.2002.1012579 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2002-05-30 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Power semiconductor devices Electronics packaging Semiconductor device packaging Bonding Power system interconnection Power system reliability Acoustic testing Integrated circuit packaging Wire Fabrication |
Content Type | Text |
Resource Type | Article |
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