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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Fukuda, E.S. Inoue, H. Takenaka, T. Dahoo Kim Sadahisa, T. Asai, T. Motomura, M. |
| Copyright Year | 2014 |
| Description | Author affiliation: NEC Corp., Kawasaki, Japan (Inoue, H.; Takenaka, T.) || Grad. Sch. of Inf. Sci. & Technol., Hokkaido Univ., Sapporo, Japan (Fukuda, E.S.; Dahoo Kim; Sadahisa, T.; Asai, T.; Motomura, M.) |
| Abstract | Memcached is a technology that improves response speed of web servers by caching data on DRAMs in distributed servers. In order to achieve higher performance, memcached has been evaluated on various platforms. Among them, FPGA seems to be the most efficient platform to run memcached, and several research groups are trying to achieve higher throughput with it. However, it is difficult to utilize a large amount of memory (several dozen gigabytes) with an FPGA. Some groups are trying to solve this problem by using an embedded CPU for memory allocation and another group is employing an SSD. Unlike other approaches that try to replace memcached itself on FPGAs, our approach augments the software memcached running on the host CPU by caching its data and some operations at the FPGA-equipped network interface card (NIC) mounted on the server. The locality of memcached data enables the FPGA NIC to have a fairly high hit rate with a smaller memory. We first explore the cache parameters by software simulations and estimate the effectiveness of our approach, and then prototype a system to prove its effectiveness. Through our evaluation with YCSB, a standard key-value store (KVS) benchmarking tool, we estimate that the latency improved by an order of magnitude over software memcached running on a high performance CPU. |
| Starting Page | 1 |
| Ending Page | 6 |
| File Size | 152988 |
| Page Count | 6 |
| File Format | |
| ISBN | 9783000446450 |
| DOI | 10.1109/FPL.2014.6927487 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-09-02 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | Technical University of Munich (TUM) |
| Subject Keyword | Field programmable gate arrays Random access memory Web servers Throughput Facebook Hardware |
| Content Type | Text |
| Resource Type | Article |
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