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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Zheng, J.X. Dongfang Li Potkonjak, M. |
| Copyright Year | 2014 |
| Description | Author affiliation: Sch. of Opt. & Electron. Inf., Huazhong Univ. of Sci. & Technol., Wuhan, China (Dongfang Li) || Comput. Sci. Dept., Univ. of California, Los Angeles, Los Angeles, CA, USA (Zheng, J.X.; Potkonjak, M.) |
| Abstract | In this paper we present a secure and unclonable embedded system design that can target either an FPGA or an ASIC technology. The premise of the security is that the executed machine code and the executing environment (the embedded processor) will authenticate each other at a per-instruction basis using Physical Unclonable Functions (PUFs) that are built into the processor. The PUFs ensure that the execution of the binary code may only proceed if the binary is compiled with the correct intrinsic knowledge of the PUFs, and that such intrinsic knowledge is virtually unique to each processor and therefore unclonable. We will explain how to implement and integrate the PUFs into the processor's execution environment such that each instruction is authenticated and de-obfuscated on-demand and how to transform an ordinary binary executable into PUF-aware, obfuscated binaries. We will also present a prototype system on a Xilinx Spartan6-based FPGA board. |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 168679 |
| Page Count | 4 |
| File Format | |
| ISBN | 9783000446450 |
| DOI | 10.1109/FPL.2014.6927428 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-09-02 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | Technical University of Munich (TUM) |
| Subject Keyword | Field programmable gate arrays Security Delays Benchmark testing Embedded systems |
| Content Type | Text |
| Resource Type | Article |
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