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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Segal, O. Margala, M. Chalamalasetti, S.R. Wright, M. |
| Copyright Year | 2014 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., Univ. of Massachusetts Lowell, Lowell, MA, USA (Segal, O.; Margala, M.) || Silicon Design Lab., HP Servers, Houston, TX, USA (Chalamalasetti, S.R.; Wright, M.) |
| Abstract | Heterogeneous computing offers a promising solution for energy efficient computing in the data center. FPGA based heterogeneous computing is an especially promising direction since it allows for the creation of custom hardware solutions for data centric parallel applications. One of the main issues delaying wide spread adoption of FPGAs as main stream high performance computing devices is the difficulty in programming them. OpenCL was meant to address the difficulties and the non-uniformity related to programming heterogeneous devices, unfortunately because of its complexity it sets the bar high for many software programmers, preventing them from directly benefiting from the computing power and energy efficiency that OpenCL and heterogeneous computing have to offer. This work presents an effort to bridge the gap by extending an existing Java programming framework (APARAPI), based on OpenCL, so that it can be used to program FPGAs at a high level of abstraction and increased ease of programmability. We run several real world algorithms to assess the performance of the APARAPI framework on both a low end and a high end system. On the low end and high and systems respectively we find up to 78-80 percent power reduction and 4.8X-5.3X speed increase running NBody simulation, as well as up to 65-80 percent power reduction and 6.2X-7X speed increase for a K-Means MapReduce algorithm running on top of the Hadoop framework and APARAPI. |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 283295 |
| Page Count | 4 |
| File Format | |
| ISBN | 9783000446450 |
| DOI | 10.1109/FPL.2014.6927442 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-09-02 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | Technical University of Munich (TUM) |
| Subject Keyword | Field programmable gate arrays Algorithm design and analysis Programming Java Kernel Computer architecture OpenCL FPGA Framework APARAPI |
| Content Type | Text |
| Resource Type | Article |
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